公开(公告)号：US20240413206A1

公开(公告)日：2024-12-12

申请号：US18409559

申请日：2024-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Jun Nam ,  Jin Bum Kim ,  Sang Moon Lee ,  Gyeom Kim ,  Hyo Jin Kim ,  Tae Hyung Lee ,  In Geon Hwang

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes: a substrate, an active pattern extending in a first horizontal direction on the substrate, a plurality of nanosheets spaced apart from each other and stacked in a vertical direction on the active pattern, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region disposed on at least one side of the gate electrode on the active pattern, the source/drain region including a first layer doped with a metal, and a second layer disposed on the first layer, and an inner spacer disposed between the gate electrode and the first layer, between each of the plurality of nanosheets, the inner spacer in contact with the first layer, the inner spacer including a metal oxide formed by oxidizing the same material as the metal.

公开(公告)号：US20240363712A1

公开(公告)日：2024-10-31

申请号：US18505279

申请日：2023-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Moon Lee ,  Jin Bum Kim ,  Hyo Jin Kim ,  Yong Jun Nam ,  In Geon Hwang

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L21/823807 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate, an active pattern extended in a first horizontal direction on the substrate, a plurality of nanosheets stacked and spaced apart from each other in a vertical direction on the active pattern, a gate electrode extended in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region on both sides of the plurality of nanosheets in the first horizontal direction on the active pattern, a gate insulating layer between the plurality of nanosheets and the gate electrode, and a doping layer between the plurality of nanosheets and the gate insulating layer, the doping layer including silicon (Si) or silicon germanium (SiGe) and doped with a doping material, at least a portion of the doping layer overlapping an uppermost nanosheet of the plurality of nanosheets in the first horizontal direction.