公开(公告)号：US11705520B2

公开(公告)日：2023-07-18

申请号：US17657761

申请日：2022-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo Jin Kim ,  Dong Woo Kim ,  Sang Moon Lee ,  Seung Hun Lee

IPC: H01L29/78 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/786 ,  H01L27/092 ,  H01L29/06

CPC classification number: H01L29/7848 ,  H01L21/76829 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/7851 ,  H01L29/78696 ,  H01L29/0653

Abstract: A semiconductor device includes first and second fin-shaped patterns disposed on a substrate and extending in a first direction, first and second channel layers disposed on the first and second fin-shaped patterns, first and second etch stop layers disposed inside the first and second channel layers, first and second gate structures extending in a second direction different from the first direction on the first channel layer with a first recess formed therebetween, third and fourth gate structures extending in the second direction on the second channel layer with a second recess formed therebetween, the first recess having a first width in the first direction and having a first depth in a third direction perpendicular to the first and second directions, the second recess having a second width different from the first width in the first direction, and having a second depth equal to the first depth in the third direction.

公开(公告)号：US20230011153A1

公开(公告)日：2023-01-12

申请号：US17672233

申请日：2022-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Woo Kim ,  Gyeom Kim ,  Jin Bum Kim ,  Dong Suk Shin ,  Sang Moon Lee

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417

Abstract: A semiconductor device comprises an active pattern on a substrate; a plurality of nanosheets spaced apart from each other; a gate electrode surrounding each of the nanosheets; a field insulating layer surrounding side walls of the active pattern; an interlayer insulating layer on the field insulating layer; a source/drain region comprising a first doping layer on the active pattern, a second doping layer on the first doping layer, and a capping layer forming side walls adjacent to the interlayer insulating layer; a source/drain contact electrically connected to, and on, the source/drain region, and a silicide layer between the source/drain region and the source/drain contact which contacts contact with the second doping layer and extends to an upper surface of the source/drain region. The capping layer extends from an upper surface of the field insulating layer to the upper surface of the source/drain region along side walls of the silicide layer.

公开(公告)号：US11322614B2

公开(公告)日：2022-05-03

申请号：US16934240

申请日：2020-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo Jin Kim ,  Dong Woo Kim ,  Sang Moon Lee ,  Seung Hun Lee

IPC: H01L29/78 ,  H01L21/768 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/786

Abstract: A semiconductor device includes first and second fin-shaped patterns disposed on a substrate and extending in a first direction, first and second channel layers disposed on the first and second fin-shaped patterns, first and second etch stop layers disposed inside the first and second channel layers, first and second gate structures extending in a second direction different from the first direction on the first channel layer with a first recess formed therebetween, third and fourth gate structures extending in the second direction on the second channel layer with a second recess formed therebetween, the first recess having a first width in the first direction and having a first depth in a third direction perpendicular to the first and second directions, the second recess having a second width different from the first width in the first direction, and having a second depth equal to the first depth in the third direction.

公开(公告)号：US11051103B2

公开(公告)日：2021-06-29

申请号：US16102150

申请日：2018-08-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Hyun Jung ,  Sang Chui Ko ,  Dong-Kyu Park ,  Sang Moon Lee ,  Byeong Geun Cheon ,  Hae Kwang Park ,  Young Tae Kim

IPC: H04R1/00 ,  H04R5/02 ,  G06F1/16 ,  G10K11/22 ,  H04R1/34 ,  H04R1/02 ,  H04R3/12 ,  H04N5/64

Abstract: A sound output apparatus, a display apparatus and a method for controlling the same are provided. The sound output apparatus includes a housing; and at least one speaker provided on a side of the housing, wherein the housing includes an accommodation portion provided with an insertion groove to which the at least one speaker is inserted and mounted, wherein the at least one speaker includes a sound generator configured to generate a sound; and a guide tube that has a cross sectional area that changes from a first end of the guide tube to a second end of the guide tube, and wherein the guide tube receives the generated sound via the first end, and the guide tube includes an outer surface having a plurality of radiation apertures arranged in at least one row.

公开(公告)号：US10269962B2

公开(公告)日：2019-04-23

申请号：US15335492

申请日：2016-10-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Ryul Lee ,  Sang Moon Lee ,  Chul Kim ,  Ji Eon Yoon

IPC: H01L29/78 ,  H01L29/423

Abstract: A semiconductor device has a fin-type structure which extends in a first direction and includes a laminate of oxide and semiconductor patterns disposed one on another on a first region of a substrate, and a first gate electrode that extends longitudinally in a second direction different from the first direction on the fin-type structure. Each oxide pattern is an oxidized compound containing a first element.

公开(公告)号：US10014173B2

公开(公告)日：2018-07-03

申请号：US15363139

申请日：2016-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Eon Yoon ,  Chul Kim ,  Sang Moon Lee ,  Seung Ryul Lee

IPC: H01L29/32 ,  H01L21/02

CPC classification number: H01L21/02639 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02598 ,  H01L21/02642 ,  H01L21/02647 ,  H01L21/0265 ,  H01L29/32

Abstract: A semiconductor single crystal structure may include a substrate; a defect trapping stack disposed on the substrate; and a semiconductor single crystal disposed on the defect trapping stack, and having a lattice mismatch with a crystal of the substrate, in which the defect trapping stack may include a first dielectric layer disposed on the substrate, and having at least one first opening, a second dielectric layer disposed on the first dielectric layer, and having at least one second opening, a third dielectric layer disposed on the second dielectric layer, and having at least one third opening, and a fourth dielectric layer disposed on the third dielectric layer, and having at least one fourth opening, and in which the semiconductor single crystal may extend to a region of the substrate defined in the at least one first opening through the at least one first to fourth opening.

公开(公告)号：US20240413206A1

公开(公告)日：2024-12-12

申请号：US18409559

申请日：2024-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Jun Nam ,  Jin Bum Kim ,  Sang Moon Lee ,  Gyeom Kim ,  Hyo Jin Kim ,  Tae Hyung Lee ,  In Geon Hwang

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes: a substrate, an active pattern extending in a first horizontal direction on the substrate, a plurality of nanosheets spaced apart from each other and stacked in a vertical direction on the active pattern, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region disposed on at least one side of the gate electrode on the active pattern, the source/drain region including a first layer doped with a metal, and a second layer disposed on the first layer, and an inner spacer disposed between the gate electrode and the first layer, between each of the plurality of nanosheets, the inner spacer in contact with the first layer, the inner spacer including a metal oxide formed by oxidizing the same material as the metal.

公开(公告)号：US20240363712A1

公开(公告)日：2024-10-31

申请号：US18505279

申请日：2023-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Moon Lee ,  Jin Bum Kim ,  Hyo Jin Kim ,  Yong Jun Nam ,  In Geon Hwang

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L21/823807 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate, an active pattern extended in a first horizontal direction on the substrate, a plurality of nanosheets stacked and spaced apart from each other in a vertical direction on the active pattern, a gate electrode extended in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region on both sides of the plurality of nanosheets in the first horizontal direction on the active pattern, a gate insulating layer between the plurality of nanosheets and the gate electrode, and a doping layer between the plurality of nanosheets and the gate insulating layer, the doping layer including silicon (Si) or silicon germanium (SiGe) and doped with a doping material, at least a portion of the doping layer overlapping an uppermost nanosheet of the plurality of nanosheets in the first horizontal direction.

公开(公告)号：US20230411529A1

公开(公告)日：2023-12-21

申请号：US18160297

申请日：2023-01-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyo Jin Kim ,  Sang Moon Lee ,  Jin Bum Kim ,  Yong Jun Nam

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/08 ,  H01L21/8234

CPC classification number: H01L29/78672 ,  H01L29/78696 ,  H01L29/0673 ,  H01L29/0847 ,  H01L21/823412 ,  H01L21/823418

Abstract: A semiconductor device includes a lower pattern extending in a first direction, a first blocking structure which is on the lower pattern and includes at least one first blocking film comprising an oxygen-doped crystalline silicon film, a source/drain pattern on the first blocking structure, and a gate structure which extends in a second direction on the lower pattern and includes a gate electrode and a gate insulating film. Related fabrication methods are also discussed.

公开(公告)号：US20210111281A1

公开(公告)日：2021-04-15

申请号：US16934240

申请日：2020-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo Jin Kim ,  Dong Woo Kim ,  Sang Moon Lee ,  Seung Hun Lee

IPC: H01L29/78

Abstract: A semiconductor device includes first and second fin-shaped patterns disposed on a substrate and extending in a first direction, first and second channel layers disposed on the first and second fin-shaped patterns, first and second etch stop layers disposed inside the first and second channel layers, first and second gate structures extending in a second direction different from the first direction on the first channel layer with a first recess formed therebetween, third and fourth gate structures extending in the second direction on the second channel layer with a second recess formed therebetween, the first recess having a first width in the first direction and having a first depth in a third direction perpendicular to the first and second directions, the second recess having a second width different from the first width in the first direction, and having a second depth equal to the first depth in the third direction.