Semiconductor device and method of fabricating same

    公开(公告)号:US12009299B2

    公开(公告)日:2024-06-11

    申请号:US18137733

    申请日:2023-04-21

    CPC classification number: H01L23/528 H01L23/5226 H01L29/0649

    Abstract: A semiconductor device includes; a semiconductor substrate including a first region and a second region, a first interlayer insulating layer on the second region, a capping layer disposed on the first interlayer insulating layer, an upper surface of the capping layer includes a first trench, conductive patterns spaced apart on the capping layer, side surfaces of the conductive patterns are aligned with inner side surfaces of the first trench, and a peripheral separation pattern disposed in the first trench to cover the side surfaces of the conductive patterns. The peripheral separation pattern has a first thickness on the side surfaces of the conductive patterns and a second thickness greater than or equal to the first thickness on a lower surface.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME

    公开(公告)号:US20240282703A1

    公开(公告)日:2024-08-22

    申请号:US18652628

    申请日:2024-05-01

    CPC classification number: H01L23/528 H01L23/5226 H01L29/0649

    Abstract: A semiconductor device includes; a semiconductor substrate including a first region and a second region, a first interlayer insulating layer on the second region, a capping layer disposed on the first interlayer insulating layer, an upper surface of the capping layer includes a first trench, conductive patterns spaced apart on the capping layer, side surfaces of the conductive patterns are aligned with inner side surfaces of the first trench, and a peripheral separation pattern disposed in the first trench to cover the side surfaces of the conductive patterns. The peripheral separation pattern has a first thickness on the side surfaces of the conductive patterns and a second thickness greater than or equal to the first thickness on a lower surface.

    Semiconductor device and method of fabricating same

    公开(公告)号:US11670591B2

    公开(公告)日:2023-06-06

    申请号:US17404757

    申请日:2021-08-17

    CPC classification number: H01L23/528 H01L23/5226 H01L29/0649

    Abstract: A semiconductor device includes; a semiconductor substrate including a first region and a second region, a first interlayer insulating layer on the second region, a capping layer disposed on the first interlayer insulating layer, an upper surface of the capping layer includes a first trench, conductive patterns spaced apart on the capping layer, side surfaces of the conductive patterns are aligned with inner side surfaces of the first trench, and a peripheral separation pattern disposed in the first trench to cover the side surfaces of the conductive patterns. The peripheral separation pattern has a first thickness on the side surfaces of the conductive patterns and a second thickness greater than or equal to the first thickness on a lower surface.

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