公开(公告)号：US20240021704A1

公开(公告)日：2024-01-18

申请号：US18176170

申请日：2023-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangmoon LEE ,  Jinbum KIM ,  Dongwoo KIM ,  Hyojin KIM ,  Yongjun NAM ,  Ingeon HWANG

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/775 ,  H01L29/423 ,  H01L27/092

CPC classification number: H01L29/66545 ,  H01L29/78696 ,  H01L29/0673 ,  H01L21/823807 ,  H01L29/775 ,  H01L29/66439 ,  H01L29/42392 ,  H01L29/78687 ,  H01L27/092

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern including a plurality of semiconductor patterns spaced apart from each other and vertically stacked, on the active pattern, a source/drain pattern connected to the plurality of semiconductor patterns, and a gate electrode including a first inner electrode provided below a first semiconductor pattern among the plurality of semiconductor patterns, on the plurality of semiconductor patterns, and a second inner electrode provided above the first semiconductor pattern, the first semiconductor pattern includes a first portion adjacent to the first inner electrode, a second portion adjacent to the second inner electrode, and a third portion between the first and second portions, the first semiconductor pattern includes a dopant having an atomic weight greater than that of silicon, and a dopant concentration of the third portion is smaller than a dopant concentration of each of the first and second portions.