公开(公告)号：US12113109B2

公开(公告)日：2024-10-08

申请号：US17313638

申请日：2021-05-06

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sungmin Kim ,  Juhun Park ,  Deokhan Bae ,  Myungyoon Um ,  Yuri Lee ,  Inyeal Lee ,  Yoonyoung Jung ,  Sooyeon Hong

IPC分类号： H01L29/417 ,  H01L27/092

CPC分类号： H01L29/41791 ,  H01L27/0924

摘要： A semiconductor device includes a first active (e.g., PMOSFET) region and an adjacent second active (e.g., NMOSFET) region on a substrate, a device isolation layer on the substrate and defining a first active pattern on the first active region and a second active pattern on the second active region, a gate electrode crossing the first and second active patterns, a first source/drain pattern and a second source/drain pattern adjacent to a side of the gate electrode, an interlayer insulating layer on the gate electrode, a first active contact penetrating the interlayer insulating layer to connect the first source/drain pattern and a second active contact penetrating the interlayer insulating layer to connect the second source/drain pattern and a buffer layer provided in an upper region of the interlayer insulating layer and interposed between the first active contact and the second active contact, wherein the buffer layer includes a material having etch selectivity with respect to the interlayer insulating layer.

公开(公告)号：US11810957B2

公开(公告)日：2023-11-07

申请号：US17469361

申请日：2021-09-08

申请人： Samsung Electronics Co., Ltd.

发明人： Juhun Park ,  Deokhan Bae ,  Jin-Wook Kim ,  Yuri Lee ,  Inyeal Lee ,  Yoonyoung Jung

IPC分类号： H01L29/417 ,  H01L27/092 ,  H01L21/8238

CPC分类号： H01L29/41775 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924

摘要： Disclosed is a semiconductor device including a substrate including first and second active regions, a device isolation layer on the substrate and defining first and second active patterns, first and second gate electrodes running across the first and second active regions and aligned with each other, first and second source/drain patterns on the first and second active patterns, a first active contact connecting the first and second source/drain patterns to each other, and a gate cutting pattern between the first and second gate electrodes. An upper portion of the first active contact includes first and second upper dielectric patterns. The first active contact has a minimum width at a portion between the first and second upper dielectric patterns. A minimum width of the gate cutting pattern is a second width. A ratio of the first width to the second width is in a range of 0.8 to 1.2.

公开(公告)号：US20240304568A1

公开(公告)日：2024-09-12

申请号：US18595666

申请日：2024-03-05

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Inyeal Lee ,  Younghoi Kim ,  Juyoun Kim ,  Jaekang Park

IPC分类号： H01L23/00 ,  H01L21/8238 ,  H01L27/092

CPC分类号： H01L23/562 ,  H01L21/823878 ,  H01L27/092

摘要： A semiconductor device includes a semiconductor substrate, a plurality of gate structures which are spaced apart from each other in a first horizontal direction on the semiconductor substrate and extend in a second horizontal direction perpendicular to the first horizontal direction, and a single diffusion brake which extends in the second horizontal direction between the plurality of gate structures and is located in a first trench having a first depth in a vertical direction. The single diffusion brake includes a lower insulating material film conformally disposed on a side wall of the first trench, an insulating liner extending onto upper surfaces of the plurality of gate structures along an inner wall of the lower insulating material film, and an upper insulating material film disposed on the insulating liner and filling the inside of the first trench.

公开(公告)号：US11996364B2

公开(公告)日：2024-05-28

申请号：US17521080

申请日：2021-11-08

申请人： Samsung Electronics Co., Ltd.

发明人： Inyeal Lee ,  Dongbeen Kim ,  Jinwook Kim ,  Juhun Park ,  Deokhan Bae ,  Junghoon Seo ,  Myungyoon Um

IPC分类号： H01L23/535 ,  H01L23/00 ,  H01L23/522 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L23/535 ,  H01L23/5226 ,  H01L24/13 ,  H01L27/0924 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/78391 ,  H01L29/7851 ,  H01L29/78696 ,  H01L2224/13025

摘要： A circuit chip including a substrate, first and second channel active regions on the substrate, and extending in a first direction, the second channel active regions spaced apart from the first channel regions in a second direction intersecting the first direction, first and second gate electrodes intersecting the second channel active regions, third and fourth gate electrodes intersecting the first channel active regions, and a contact electrode between the first, second, third, and fourth gate electrodes. The contact electrode including a stem section in a vertical direction, and first and second branch sections extending from the stem section and contacting a respective source/drain region on the first and second channel active regions, the first gate electrode and the third gate electrode overlapping in the second direction, and including edge portions having widths decreasing as the first gate electrode and the third gate electrode extend toward facing ends thereof.