公开(公告)号：US20220093206A1

公开(公告)日：2022-03-24

申请号：US17319493

申请日：2021-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hyun JOO ,  Tae-Min PARK ,  Hyungsoo KIM ,  Jaewoo IM ,  Won-Taeck JUNG

IPC: G11C29/50 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34 ,  H01L27/11556 ,  H01L27/11582 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: Disclosed is a nonvolatile memory device, which includes a memory cell array including cell strings, a row decoder connected with a ground selection transistor of each of the cell strings through a ground selection line, connected with memory cells of each of the cell strings through word lines, and connected with a string selection transistor of each of the cell strings through a string selection line, and a page buffer connected with the cell strings through bit lines. In a first period of a check operation, the page buffer applies a first bias voltage to the bit lines, and the row decoder applies a turn-off voltage to the ground selection line, a turn-on voltage to the string selection line, and a first check voltage to the word lines. In a second period of the check operation, the page buffer senses first changes of voltages of the bit lines.

公开(公告)号：US20160125948A1

公开(公告)日：2016-05-05

申请号：US14993464

申请日：2016-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taesung LEE ,  Jaewoo IM

IPC: G11C16/26 ,  G11C16/08

CPC classification number: G11C16/26 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/28 ,  G11C2213/71

Abstract: An output circuit of a nonvolatile memory device includes a sense amplification circuit configured to, during a sensing operation, generate output data based on a comparison between a first voltage on a data line and a reference voltage on a reference data line during a sensing operation, the first voltage corresponding to data read from at least one memory cell, and the sense amplification circuit being further configured to connect the reference data line with a ground terminal during the sensing operation.

Abstract translation: 非易失性存储器件的输出电路包括读出放大电路，其被配置为在感测操作期间，在感测操作期间，基于数据线上的第一电压与参考数据线上的参考电压之间的比较来产生输出数据， 所述第一电压对应于从至少一个存储单元读取的数据，并且所述感测放大电路还被配置为在所述感测操作期间将所述参考数据线与接地端连接。