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公开(公告)号:US20220037461A1
公开(公告)日:2022-02-03
申请号:US17189700
申请日:2021-03-02
发明人: Gihee CHO , Sangyeol KANG , Jungoo KANG , Taekyun KIM , Jiwoon PARK , Sanghyuck AHN , Jin-Su LEE , Hyun-Suk LEE , Hongsik CHAE
IPC分类号: H01L49/02 , H01L27/108
摘要: A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.
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2.
公开(公告)号:US20240170214A1
公开(公告)日:2024-05-23
申请号:US18479747
申请日:2023-10-02
发明人: Woochul LEE , Cheheung KIM , Jiwoon PARK , Jooho LEE , Hojin LEE
CPC分类号: H01G4/1218 , H01G4/008 , H01G4/306
摘要: An electronic device and a manufacturing method including a dielectric layer according to at least some embodiments are disclosed. The electronic device includes a first electrode, a second electrode spaced apart from the first electrode, a first dielectric layer between the first electrode and the second electrode, a second dielectric layer having a rutile phase, a third dielectric layer between the first dielectric layer and the second electrode, and a third dielectric layer between the second dielectric layer and the second electrode and including a material having a higher energy bandgap than a material included in the second dielectric layer.
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公开(公告)号:US20230164976A1
公开(公告)日:2023-05-25
申请号:US17837314
申请日:2022-06-10
发明人: Jiwoon PARK , Young-Geun PARK , Hojin LEE
IPC分类号: H01L27/108
CPC分类号: H01L27/10814 , H01L27/10823 , H01L27/10852
摘要: Disclosed is a semiconductor device comprising a substrate, a contact structure that penetrates the substrate, a bottom electrode on the substrate and connected to the contact structure, a dielectric layer that covers the bottom electrode, and a top electrode on the bottom electrode. The dielectric layer separates the top electrode from the bottom electrode. The contact structure includes a lower conductive pattern and an upper conductive pattern on the lower conductive pattern. The upper conductive pattern includes a nitride of a first metal implanted with a dopant.
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4.
公开(公告)号:US20230102906A1
公开(公告)日:2023-03-30
申请号:US17715473
申请日:2022-04-07
发明人: Changsoo LEE , Jinhong KIM , Yongsung KIM , Jiwoon PARK , Jooho LEE , Yong-Hee CHO
IPC分类号: H01L49/02 , H01L27/108
摘要: A capacitor includes a lower electrode layer including a first conductive layer and a second conductive layer on the first conductive layer, the second conductive layer including SnO2 doped with an impurity; a dielectric layer on the second conductive layer, the dielectric layer including a rutile-phase oxide; and an upper electrode layer on the dielectric layer.
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公开(公告)号:US20220414033A1
公开(公告)日:2022-12-29
申请号:US17670962
申请日:2022-02-14
发明人: Kwangsoo PARK , Jae-Sang YUN , Su-Jin KIM , Jiwoon PARK
摘要: Disclosed is an electronic device which includes a plurality of memory devices, a memory controller, a first signal line that makes electrical connection between the memory controller and a first branch point, a second signal line that makes electrical connection between the first branch point and a second branch point, a third signal line that makes electrical connection between the first branch point and a third branch point, a fourth signal line that electrically connects the second branch point and the first memory device, a fifth signal line that electrically connects the second branch point and the second memory device, a sixth signal line that electrically connects the third branch point and the third memory device, and a stub that includes a first end electrically connected with at least one of the plurality of signal lines, and a second end being left open-circuit.
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公开(公告)号:US20220336578A1
公开(公告)日:2022-10-20
申请号:US17857383
申请日:2022-07-05
发明人: Gihee CHO , Sangyeol KANG , Jungoo KANG , Taekyun KIM , Jiwoon PARK , Sanghyuck AHN , Jin-Su LEE , Hyun-Suk LEE , Hongsik CHAE
IPC分类号: H01L49/02 , H01L27/108
摘要: A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.
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