公开(公告)号：USD782331S1

公开(公告)日：2017-03-28

申请号：US29542214

申请日：2015-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Jong-Uk Kim ,  Shin-Hyup Kang ,  Young-Chae Kim

公开(公告)号：US10026890B2

公开(公告)日：2018-07-17

申请号：US15177597

申请日：2016-06-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Uk Kim ,  Jung-Moo Lee ,  Soon-Oh Park ,  Jung-Hwan Park ,  Sug-Woo Jung

IPC: H01L43/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: A method of manufacturing a magnetoresistive random access memory device, the method including forming a memory structure on a substrate, the memory structure including a lower electrode, a magnetic tunnel junction structure, and an upper electrode sequentially stacked; forming a first capping layer to cover a surface of the memory structure by a deposition process using a plasma under first conditions; and forming a second capping layer on the first capping layer by a deposition process using a plasma under second conditions different from the first conditions.

公开(公告)号：US11171287B2

公开(公告)日：2021-11-09

申请号：US16365874

申请日：2019-03-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Uk Kim ,  Young-Min Ko ,  Byong-Ju Kim ,  Kwang-Min Park ,  Jeong-Hee Park ,  Dong-Sung Choi

IPC: H01L45/00 ,  H01L27/24

Abstract: A variable resistance memory device may include a memory unit including a first electrode disposed on a substrate, a variable resistance pattern disposed on the first electrode and a second electrode disposed on the variable resistance pattern, a selection pattern disposed on the memory unit, and a capping structure covering a sidewall of the selection pattern. The capping structure may include a first capping pattern and a second capping pattern sequentially stacked on at least one sidewall of the selection pattern. The first capping pattern may be silicon pattern, and the second capping pattern may include a nitride.

公开(公告)号：USD782332S1

公开(公告)日：2017-03-28

申请号：US29542218

申请日：2015-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Jong-Uk Kim ,  Shin-Hyup Kang ,  Young-Chae Kim

公开(公告)号：US10249816B2

公开(公告)日：2019-04-02

申请号：US15996605

申请日：2018-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Uk Kim ,  Jung-Moo Lee ,  Soon-Oh Park ,  Jung-Hwan Park ,  Sug-Woo Jung

IPC: H01L43/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: A method of manufacturing a magnetoresistive random access memory device, the method including forming a memory structure on a substrate, the memory structure including a lower electrode, a magnetic tunnel junction structure, and an upper electrode sequentially stacked; forming a first capping layer to cover a surface of the memory structure by a deposition process using a plasma under first conditions; and forming a second capping layer on the first capping layer by a deposition process using a plasma under second conditions different from the first conditions.

公开(公告)号：USD782330S1

公开(公告)日：2017-03-28

申请号：US29542162

申请日：2015-10-12

Applicant: Samsung Electronics Co., Ltd.

Designer： Jong-Uk Kim ,  Shin-Hyup Kang ,  Young-Chae Kim

公开(公告)号：USD785083S1

公开(公告)日：2017-04-25

申请号：US29572525

申请日：2016-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Yong-Nam Ahn ,  Shin-Hyup Kang ,  Young-Chae Kim ,  Jong-Uk Kim

公开(公告)号：USD765770S1

公开(公告)日：2016-09-06

申请号：US29512075

申请日：2014-12-16

Applicant: Samsung Electronics Co., Ltd.

Designer： Yong-Nam Ahn ,  Shin-Hyup Kang ,  Young-Chae Kim ,  Jong-Uk Kim