公开(公告)号：US20240070067A1

公开(公告)日：2024-02-29

申请号：US18238283

申请日：2023-08-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghyun CHOI ,  Keunsan PARK ,  Joon-Whan BAE ,  Jooyoung HWANG ,  Gyeongmin KIM ,  Heetak SHIN ,  Junyeong HAN

IPC: G06F12/02

CPC classification number: G06F12/0292 ,  G06F12/023 ,  G06F2212/1016

Abstract: A storage device, including: a nonvolatile memory device comprising a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each zone of the plurality of zones, fixedly and sequentially manage logical addresses of data to be written in the plurality of zones, and generate at least two map tables for the each zone

公开(公告)号：US20230205440A1

公开(公告)日：2023-06-29

申请号：US17903604

申请日：2022-09-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Insoon JO ,  Jooyoung HWANG

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0679 ,  G06F3/0607

Abstract: A method of operating a storage device which communicates with a host device, includes receiving a request for an access to target data from the host device, executing an indirect access module based on the request, determining, by the indirect access module, a target address indicating a location of the target data based on an access parameter of the request, accessing, by the indirect access module, a data block based on the target address, and providing, by the indirect access module, the host device with the accessed data block or the target data in the accessed data block.

公开(公告)号：US20240070066A1

公开(公告)日：2024-02-29

申请号：US18238262

申请日：2023-08-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghyun CHOI ,  Keunsan PARK ,  Heetak SHIN ,  Junyeong HAN ,  Gyeongmin KIM ,  Joon-Whan BAE ,  Jooyoung HWANG

IPC: G06F12/02 ,  G06F11/10

CPC classification number: G06F12/0292 ,  G06F11/1068 ,  G06F2212/1016

Abstract: A storage device, including a nonvolatile memory device comprising a plurality of memory cells; and a controller configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, fixedly and sequentially manage logical addresses of data written in the plurality of zones, generate a first page map table corresponding to a first zone based on performing the write operation on the first zone, the first page map table comprising a logical address and a physical address of the first zone, based on the first zone being full, activate a read service, which is based on the zone map table, and based on the read service being activated, process read requests for the first zone from the external host device using the zone map table.

公开(公告)号：US20220221987A1

公开(公告)日：2022-07-14

申请号：US17566309

申请日：2021-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunghyun NOH ,  Byungki LEE ,  Junhee KIM ,  Keunsan PARK ,  Jekyeom JEON ,  Jinhwan CHOI ,  Jooyoung HWANG

IPC: G06F3/06

Abstract: A computing system includes a storage system configured to store data, and a host configured to compress a data block of a preset size loaded to a memory, generate a merged block of the preset size by merging a compressed block corresponding to the data block, an identifier of a node block referring the data block, and an offset indicating an index of the data block among at least one data block referred by the node block, and provide the merged block to the storage system.

公开(公告)号：US20240069750A1

公开(公告)日：2024-02-29

申请号：US18240169

申请日：2023-08-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kui-Yon MUN ,  Junyeong HAN ,  Jooyoung HWANG ,  Gyeongmin KIM ,  Keunsan PARK ,  Joon-Whan BAE ,  Heetak SHIN ,  Seunghyun CHOI

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0631 ,  G06F3/0652 ,  G06F3/0679

Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device in response to a request of an external host device, select two or more erase units among a plurality of erase units of the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the controller includes an internal buffer configured to store first data to be written in a first zone from among the plurality of zones, and wherein the controller is further configured to perform a backup operation for the first data by selecting an erase unit in which the first data are to be written, and a cell type of the erase unit based on a feature of the first zone.

公开(公告)号：US20210232330A1

公开(公告)日：2021-07-29

申请号：US17019429

申请日：2020-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yohan KO ,  Dong-Uk KIM ,  Insoon JO ,  Jooyoung HWANG

IPC: G06F3/06

Abstract: A storage device includes a first interface, an operation circuit, and a nonvolatile memory. The first interface receives a first data chunk from a host device. The operation circuit generates first processed data by processing the first data chunk and generates a first signal indicating a size of the first processed data. The nonvolatile memory stores the first processed data in a storage location, when the storage location at which the first processed data are to be stored is designated to the storage device based on the first signal. The first interface outputs the first signal to the host device.

公开(公告)号：US20210200454A1

公开(公告)日：2021-07-01

申请号：US17038371

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byeonghui KIM ,  Jungmin SEO ,  Kangho ROH ,  Hyeongyu MIN ,  Jooyoung HWANG

IPC: G06F3/06 ,  G06N20/00

Abstract: A method includes sampling input/output requests from a host to generate sampled input/output requests; classifying the sampled input/output requests into clusters using an unsupervised learning algorithm; determining a hot data range based on a characteristic of the clusters; and incorporating the determined hot data range into a hot data table.

公开(公告)号：US20200097367A1

公开(公告)日：2020-03-26

申请号：US16529320

申请日：2019-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhwan KIM ,  Yonggil SONG ,  Chul LEE ,  Jooyoung HWANG

IPC: G06F11/14 ,  G06F3/06 ,  G11C14/00

Abstract: A storage device includes a nonvolatile memory device, a random access memory that includes a first region and a second region, and a controller that is configured to use the first region of the random access memory as a journal memory for a journal indicating modification of data of the second region, expose a user region of the nonvolatile memory device to an external host device as a first access region of a block unit, and expose the second region of the random access memory to the external host device as both a second access region of the block unit and a third access region of a byte unit.

公开(公告)号：US20240311015A1

公开(公告)日：2024-09-19

申请号：US18388329

申请日：2023-11-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jooyoung HWANG ,  Hyun Jin Choi

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0616 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7205

Abstract: In some embodiments, a storage device includes a nonvolatile memory device including a plurality of erase units, and a memory controller. Each of the plurality of erase units include a plurality of memory cells. The memory controller is configured to assign first memory cells of each of first erase units among the plurality of erase units as y-level cells, assign second memory cells of each of second erase units among the plurality of erase units as x-level cells, allocate a zone to at least one first erase unit among the first erase units and permit a sequential write with respect to the zone, buffer data to be written in the zone by using at least one second erase unit among the second erase units, and provide, to the external host device, information about the at least one second erase unit buffering the data to be written in the zone.

公开(公告)号：US20220222011A1

公开(公告)日：2022-07-14

申请号：US17647745

申请日：2022-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinhwan CHOI ,  Byungki LEE ,  Junhee KIM ,  Sunghyun NOH ,  Keunsan PARK ,  Jekyeom JEON ,  Jooyoung HWANG

IPC: G06F3/06

Abstract: A processor configured to control a storage device includes at least one host write buffer generated based on device information of the storage device, and a control module configured to control the at least one host write buffer. The control module is further configured to store, in the at least one host write buffer, a plurality of write commands and merge the plurality of write commands to generate a merged write command.