SEMICONDUCTOR DEVICE INCLUDING ELECTROSTATIC DISCHARGE (ESD) CIRCUIT

    公开(公告)号:US20250169192A1

    公开(公告)日:2025-05-22

    申请号:US18674705

    申请日:2024-05-24

    Abstract: A semiconductor device includes a first pad configured to receive and transmit a signal; a second pad to which a predetermined reference voltage is input; and an electrostatic protection circuit includes an emitter region electrically connected to the second pad and doped with a first conductivity-type impurity, a base region having a shape surrounding the emitter region in the first direction and the second direction and doped with a second conductivity-type impurity, different from the first conductivity-type impurity, a collector region connected to the first pad and having a shape surrounding the emitter region in the first direction and the second direction, and an impurity region disposed between the collector region and the base region and separated from the collector region and the base region by an element isolation film.

    DEVICE FOR ELECTROSTATIC DISCHARGE PROTECTION USING SILICON CONTROLLED RECTIFIER

    公开(公告)号:US20240222963A1

    公开(公告)日:2024-07-04

    申请号:US18402453

    申请日:2024-01-02

    CPC classification number: H02H9/045

    Abstract: A device including a first clamp circuit connected between a first node and a second node, wherein the first clamp circuit includes: a symmetric bipolar transistor comprising a control terminal, a first current terminal and a second current terminal, wherein the first current terminal and the second current terminal are symmetrical to each other with respect to the control terminal; a first bipolar transistor electrically connected to the symmetric bipolar transistor and to the first node; and a second bipolar transistor electrically connected to the symmetric bipolar transistor and to the second node.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20240421149A1

    公开(公告)日:2024-12-19

    申请号:US18582871

    申请日:2024-02-21

    Abstract: A semiconductor device includes a substrate doped with first conductivity-type impurities, a first well doped with second conductivity-type impurities different from the first conductivity-type impurities, first active regions in the first well, the first active regions being doped with the first conductivity-type impurities and connected to a first pad through a first interconnection, second active regions outside the first well, the second active regions being doped with the second conductivity-type impurities and connected to a second pad through a second interconnection, third active regions around the first active regions in the first well and doped with the second conductivity-type impurities, and fourth active regions around the second active regions outside the first well and doped with the first conductivity-type impurities, wherein at least one of the third active regions and at least one of the fourth active regions are electrically connected to each other through a third interconnection.

    DEVICE FOR ELECTROSTATIC DISCHARGE PROTECTION USING SILICON CONTROLLED RECTIFIER

    公开(公告)号:US20240222357A1

    公开(公告)日:2024-07-04

    申请号:US18400792

    申请日:2023-12-29

    CPC classification number: H01L27/0248 H01L29/7408 H01L29/7412

    Abstract: Provided is a device including a first clamp circuit electrically connected between a first node and a second node, and a second clamp circuit electrically connected between the second node and a third node, wherein the first clamp circuit includes a first silicon controlled rectifier (SCR) including a first region of a first conductivity type electrically connected to the first node, a second region of a second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type electrically connected to the second node, and a first gate electrode disposed over a channel region including a junction of the second region and the third region between the first region and the fourth region.

    SEMICONDUCTOR DEVICE
    6.
    发明申请

    公开(公告)号:US20240405014A1

    公开(公告)日:2024-12-05

    申请号:US18405843

    申请日:2024-01-05

    Abstract: The present disclosure relates to semiconductor devices. An example semiconductor device includes a first well region and a second well region isolated from each other by a first device isolation film; an NPN transistor provided by a first collector region formed in the first well region and including first conductivity-type impurities, and a first emitter region formed in the second well region and including the first conductivity-type impurities; a PNP transistor provided by a second emitter region formed in the first well region and including second conductivity-type impurities different from the first conductivity-type, and a second collector region formed in the second well region and including the second conductivity-type impurities; and an NMOS transistor including a source region and a drain region formed in the second well region and including the first conductivity-type impurities, and a gate structure disposed between the source region and the drain region.

    SEMICONDUCTOR DEVICE
    7.
    发明公开

    公开(公告)号:US20240259008A1

    公开(公告)日:2024-08-01

    申请号:US18236303

    申请日:2023-08-21

    CPC classification number: H03K17/08

    Abstract: A semiconductor device is provided. The semiconductor device includes: a first power pad; a second power pad; a signal pad; a clamping circuit connected between the first power pad and the second power pad; a driving circuit connected to the signal pad and including a pull-up circuit and a pull-down circuit; and a first gate-off circuit connected to the pull-down circuit. The first gate-off circuit is configured to connect a gate of the pull-down circuit and a source of the pull-down circuit to each other during an electrostatic discharge (ESD) event in which a high voltage is applied to the signal pad, and control a current generated by the high voltage to flow to the clamping circuit.

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