公开(公告)号：US20190013206A1

公开(公告)日：2019-01-10

申请号：US15844681

申请日：2017-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Hoon PARK ,  Joong Shik SHIN ,  BYOUNG IL LEE ,  Jong Ho WOO ,  Eun Taek JUNG ,  Jun Ho CHA

IPC: H01L21/3105 ,  H01L27/11531 ,  H01L21/763 ,  H01L21/28 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/11573 ,  H01L27/11592

Abstract: A semiconductor device includes a substrate having a first region and a second region, the first region including memory cells, and the second region including transistors for driving the memory cells, and device isolation regions disposed within the substrate to define active regions of the substrate. The active regions include a first guard active region surrounding the first region, a second guard active region surrounding a portion of the second region, and at least one dummy active region disposed between the first guard active region and the second guard active region.

公开(公告)号：US20180374862A1

公开(公告)日：2018-12-27

申请号：US15925365

申请日：2018-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung Il LEE ,  Ji Mo GU ,  Tak LEE ,  Jun Ho CHA

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11529 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/1157 ,  H01L27/11548

CPC classification number: H01L27/11556 ,  H01L27/11529 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

Abstract: A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each other in the second direction.

公开(公告)号：US20200176470A1

公开(公告)日：2020-06-04

申请号：US16780999

申请日：2020-02-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Mo GU ,  Kyeong Jin PARK ,  Hyun Mog PARK ,  Byoung II LEE ,  Tak LEE ,  Jun Ho CHA

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11548 ,  H01L27/11524 ,  H01L27/11575

Abstract: A semiconductor device includes first gate electrodes including a first lower electrode, a first upper electrode disposed above the first lower electrode and including a first pad region, and one or more first intermediate electrodes disposed between the first lower electrode and the first upper electrode. Second gate electrodes include a second lower electrode, a second upper electrode disposed above the second lower electrode, and one or more second intermediate electrodes disposed between the second lower electrode and the second upper electrode. The second gate electrodes are sequentially stacked above the first upper electrode, while exposing the first pad region. The first lower electrode extends by a first length, further than the first upper electrode, in a first direction. The second lower electrode extends by a second length, different from the first length, further than the second upper electrode, in the first direction.

公开(公告)号：US20200144277A1

公开(公告)日：2020-05-07

申请号：US16724444

申请日：2019-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung Il LEE ,  Ji Mo GU ,  Tak LEE ,  Jun Ho CHA

IPC: H01L27/11556 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11548 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11565

Abstract: A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each other in the second direction.