公开(公告)号：US20150178155A1

公开(公告)日：2015-06-25

申请号：US14580815

申请日：2014-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namshik KIM ,  Tae-Hwan KIM ,  Daewook KIM ,  Biwoong CHUNG ,  Junjin KONG

IPC: G06F11/10 ,  G11C29/52

CPC classification number: G06F11/1012 ,  G11C11/419

Abstract: A storage device is provided which includes an ECC circuit. At a write operation, the ECC circuit generates a CRC (cyclic redundancy check) parity corresponding to data and generates an ECC (error correction code) parity corresponding to the data using an error correction code. At a read operation about the data stored in the at least one nonvolatile memory device, the ECC circuit corrects an error of the data using the CRC parity and the ECC parity.

Abstract translation: 提供了一种包括ECC电路的存储装置。 在写入操作中，ECC电路产生与数据相对应的CRC（循环冗余校验）奇偶校验，并使用纠错码产生对应于数据的ECC（纠错码）奇偶校验。 在关于存储在至少一个非易失性存储器件中的数据的读取操作中，ECC电路使用CRC奇偶校验和ECC奇偶校验校正数据的错误。

公开(公告)号：US20140204675A1

公开(公告)日：2014-07-24

申请号：US14225601

申请日：2014-03-26

Applicant: Samsung Electronics Co., Ltd

Inventor： Kyoung Lae CHO ,  Heeseok EUN ,  Junjin KONG

IPC: G11C16/10 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/3454 ,  G11C16/3459

Abstract: A method of programming a non-volatile memory device including a plurality of strings arranged in rows and columns comprises activating all or a part of selection lines in one column at the same time depending upon data to be programmed, driving a bit line corresponding to the one column with a bit line program voltage, and repeating the activating and the driving until bit lines corresponding to the columns are all driven.

Abstract translation: 一种编程包括以行和列排列的多个串的非易失性存储器件的方法包括根据要编程的数据同时激活一列中的一列中的全部或一部分选择线，驱动对应于 具有位线编程电压的一列，并重复激活和驱动，直到与列相对应的位线都被驱动。

公开(公告)号：US20190180793A1

公开(公告)日：2019-06-13

申请号：US15836067

申请日：2017-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： AMIT BERMAN ,  Junjin KONG ,  Uri Beitler

IPC: G11C5/14 ,  G11C11/24 ,  G06F3/06 ,  G11C11/00

Abstract: A solid-state drive (SSD) may include a volatile buffer such as DRAM, a non-volatile memory (NVM) such as NAND Flash connected to the volatile buffer, and a capacitor connected to both, where the capacitor may have an energy capacity insufficient to supply the buffer and NVM using a normal supply voltage in a normal mode, but sufficient to supply the buffer and NVM using at least one reduced supply voltage in a temporary mode; and a related method may include programming data to the NVM by temporarily reducing the supply voltage to the NVM, and writing data to the NVM using the reduced supply voltage.

公开(公告)号：US20150220283A1

公开(公告)日：2015-08-06

申请号：US14616153

申请日：2015-02-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Chu OH ,  JongHa KIM ,  Junjin KONG ,  Hong Rak SON

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/061 ,  G06F3/0679 ,  G06F12/00 ,  G06F12/0246

Abstract: An operating method of a nonvolatile memory device which includes receiving a plurality of sub-page data and a write command from an external device; performing a pre-main program operation such that at least one of the plurality of sub-page data is stored in the second plurality of memory cells included in the main region; performing a buffered program operation such that other received sub-page data is stored in the first plurality of memory cells included in the buffer region; and performing a re-main program operation such that the received sub-page data subjected to the buffered program operation at the buffer region is stored in the second plurality of memory cells subjected to the pre-main program operation.

Abstract translation: 一种非易失性存储器件的操作方法，包括从外部设备接收多个子页面数据和写入命令; 执行预主程序操作，使得所述多个子页数据中的至少一个存储在所述主区域中包括的所述第二多个存储单元中; 执行缓冲的程序操作，使得其他接收的子页数据存储在包括在缓冲区中的第一多个存储单元中; 以及执行重主程序操作，使得经受缓冲区域缓冲的程序操作的接收到的子页数据被存储在经受主程序编程操作的第二多个存储单元中。

公开(公告)号：US20170102996A1

公开(公告)日：2017-04-13

申请号：US15288227

申请日：2016-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geunyeong YU ,  Junjin KONG ,  Beom Kyu SHIN ,  Myungkyu LEE ,  Jiyoup KIM ,  Dongmin SHIN

IPC: G06F11/10 ,  G06F3/06

CPC classification number: G06F11/1092 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0683

Abstract: A redundant array of inexpensive disks (RAID) controller of a RAID storage system that includes one or more storage devices includes an error correction code (ECC) result manager configured to manage information of ECC result indicators when a data chunk that includes one or more ECC data units having an uncorrectable ECC error is read from among a plurality of data chunks dispersively stored in the one or more storage devices, each of the plurality of data chunks including a plurality of ECC data units, the ECC result indicators respectively indicating whether the plurality of ECC data units included in the plurality of data chunks has an uncorrectable ECC error; and an uncorrectable error counter configured to calculate a number of ECC result indicators indicating an uncorrectable ECC error among ECC result indicators corresponding to ECC data units having a same order in each of the plurality pluralit.y of data chunks.

公开(公告)号：US20140108748A1

公开(公告)日：2014-04-17

申请号：US14054964

申请日：2013-10-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kijun LEE ,  Junjin KONG ,  Dong-Min SHIN ,  Kyeongcheol YANG ,  Seung-Chan LIM

IPC: G06F12/00

CPC classification number: G06F12/00 ,  H03M13/1111 ,  H03M13/1191 ,  H03M13/13 ,  H03M13/6362 ,  H04L1/0009

Abstract: An operating method of a controller includes selecting bits of code word to be punctured; detecting locations of incapable bits of an input word based on locations of the bits to be punctured and a structure of a generation matrix calculation unit; refreezing the input word such that frozen bits and incapable bits of the input word overlap; generating input word bits by replacing information word bits with frozen bits based on the refreezing result; generating the code word by performing generation matrix calculation on the input word bits; generating output bits by puncturing the code word based on locations of the bits to be punctured; and transmitting the output bits to a nonvolatile memory device.

Abstract translation: 控制器的操作方法包括选择要被穿孔的代码字的位; 基于要被删截的位的位置检测输入字的不能位的位置和生成矩阵计算单元的结构; 重新冻结输入字，使得输入字的冻结位和无效位重叠; 通过基于重新冻结结果将具有冻结位的信息字位替换来产生输入字位; 通过对输入字位执行生成矩阵计算来生成码字; 通过基于要被穿孔的比特的位置来对码字进行删截来产生输出比特; 并将输出比特发送到非易失性存储器件。