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公开(公告)号:US20220336344A1
公开(公告)日:2022-10-20
申请号:US17853625
申请日:2022-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sidharth Rastogi , Subhash KUCHANURI , Jae Seok YANG , Kwan Young CHUN
IPC: H01L23/522 , H01L27/092 , H01L21/8238 , H01L29/06 , H01L29/417 , H01L29/78
Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends. An upper surface of the insulator is higher than an upper surface of the first fin pattern and an upper surface of the second fin pattern.
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公开(公告)号:US20200328147A1
公开(公告)日:2020-10-15
申请号:US16916811
申请日:2020-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sidharth Rastogi , Subhash KUCHANURI , Jae Seok YANG , Kwan Young CHUN
IPC: H01L23/522 , H01L27/092 , H01L21/8238 , H01L29/06
Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends. An upper surface of the insulator is higher than an upper surface of the first fin pattern and an upper surface of the second fin pattern.
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公开(公告)号:US20200091349A1
公开(公告)日:2020-03-19
申请号:US16435657
申请日:2019-06-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myung Gil KANG , Dong Won KIM , Geum Jong BAE , Kwan Young CHUN
IPC: H01L29/786 , H01L27/11 , H01L27/092 , H01L29/06 , H01L29/423
Abstract: A semiconductor device is provided. The semiconductor device includes: a first wire pattern disposed on a substrate and extending in a first direction; a first gate electrode surrounding the first wire pattern and extending in a second direction, the first direction intersecting the second direction perpendicularly; a first transistor including the first wire pattern and the first gate electrode; a second wire pattern disposed on the substrate and extending in the first direction; a second gate electrode surrounding the second wire pattern and extending in the second direction; and a second transistor including the second wire pattern and the second gate electrode, wherein a width of the first wire pattern in the second direction is different from a width of the second wire pattern in the second direction.
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公开(公告)号:US20190080998A1
公开(公告)日:2019-03-14
申请号:US15936882
申请日:2018-03-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sidharth Rastogi , Subhash KUCHANURI , Jae Seok YANG , Kwan Young CHUN
IPC: H01L23/522 , H01L27/092 , H01L29/06 , H01L21/8238
Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends. An upper surface of the insulator is higher than an upper surface of the first fin pattern and an upper surface of the second fin pattern.
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公开(公告)号:US20240079331A1
公开(公告)日:2024-03-07
申请号:US18195970
申请日:2023-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Azmat RAHEEL , Jae Hyoung LIM , Kwan Young CHUN
IPC: H01L23/528 , H01L27/092 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/775
CPC classification number: H01L23/5286 , H01L27/0922 , H01L29/0673 , H01L29/41733 , H01L29/42392 , H01L29/775
Abstract: A semiconductor device includes: first and second active patterns spaced apart from each other in a third direction; a gate electrode covering the first and second active patterns and extending in a second direction; a first source/drain region disposed on opposing sides of the gate electrode and connected to the first active pattern; a second source/drain region disposed on opposing sides of the gate electrode and connected to the second active pattern; a plurality of first upper metal lines extending in a first direction on the second active pattern and spaced apart from each other in the second direction; and a lower metal line extending in the first direction on the first active pattern, wherein the first direction, the second direction and the third direction intersect each other.
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公开(公告)号:US20210320213A1
公开(公告)日:2021-10-14
申请号:US17354605
申请日:2021-06-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myung Gil KANG , Dong Won KIM , Geum Jong BAE , Kwan Young CHUN
IPC: H01L29/786 , H01L27/11 , H01L29/423 , H01L27/092 , H01L29/06
Abstract: A semiconductor device is provided. The semiconductor device includes: a first wire pattern disposed on a substrate and extending in a first direction; a first gate electrode surrounding the first wire pattern and extending in a second direction, the first direction intersecting the second direction perpendicularly; a first transistor including the first wire pattern and the first gate electrode; a second wire pattern disposed on the substrate and extending in the first direction; a second gate electrode surrounding the second wire pattern and extending in the second direction; and a second transistor including the second wire pattern and the second gate electrode, wherein a width of the first wire pattern in the second direction is different from a width of the second wire pattern in the second direction.
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公开(公告)号:US20180090492A1
公开(公告)日:2018-03-29
申请号:US15473913
申请日:2017-03-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Rajeev RANJAN , Deepak SHARMA , Subhash KUCHANURI , Chul Hong PARK , Jae Seok YANG , Kwan Young CHUN
IPC: H01L27/088 , H01L23/528 , H01L27/02 , H01L29/06 , H01L27/092 , H01L23/522
Abstract: Integrated circuit devices are provided. The IC devices may include an active region extending in a first direction, first and second gate electrodes extending in a second direction, a first impurity region in the active region adjacent a first side of the first gate electrode, a second impurity region in the active region between a second side of the first gate electrode and a first side of the second gate electrode, a third impurity region in the active region adjacent a second side of the second gate electrode, a cross gate contact electrically connecting the first and second impurity regions, a first contact electrically connected to the third impurity region, a first wire electrically connected to the cross gate contact, and a second wire electrically connected to the first contact. The first and second wires may extend only in the first direction and may be on the same line.
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