公开(公告)号：US20170148877A1

公开(公告)日：2017-05-25

申请号：US15423406

申请日：2017-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongki JUNG ,  Myungil KANG ,  Yoonhae KIM ,  Kwanheum LEE

IPC: H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/0847 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, an active fin protruding from the substrate, and an asymmetric diamond-shaped source/drain disposed on an upper surface of the active fin. The source/drain includes a first crystal growth portion and a second crystal growth portion sharing a plane with the first crystal growth portion and having a lower surface disposed at a lower level than a lower surface of the first crystal growth portion.

公开(公告)号：US20240204050A1

公开(公告)日：2024-06-20

申请号：US18588586

申请日：2024-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongki JUNG ,  Myungil KANG ,  Yoonhae KIM ,  Kwanheum LEE

IPC: H01L29/08 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, a first active fin on the substrate, the first active fin including a first side surface and a second side surface opposing the first side surface, a second active fin on the substrate, the second active fin including a third side surface facing the second side surface and a fourth side surface opposing the third side surface of the second active fin, a first isolation layer on the first side surface of the first active fin, a second isolation layer between the second side surface of the first active fin and the third side surface of the second active fin, a third isolation layer on the fourth side surface of the second active fin and a merged source/drain on the first and second active fins.

公开(公告)号：US20220246724A1

公开(公告)日：2022-08-04

申请号：US17725617

申请日：2022-04-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongki Jung ,  Myungil KANG ,  Yoonhae KIM ,  Kwanheum LEE

IPC: H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

Abstract: A semiconductor device includes a substrate, a first active fin on the substrate, the first active fin including a first side surface and a second side surface opposing the first side surface, a second active fin on the substrate, the second active fin including a third side surface facing the second side surface and a fourth side surface opposing the third side surface of the second active fin, a first isolation layer on the first side surface of the first active fin, a second isolation layer between the second side surface of the first active fin and the third side surface of the second active fin, a third isolation layer on the fourth side surface of the second active fin and a merged source/drain on the first and second active fins.

公开(公告)号：US20230109987A1

公开(公告)日：2023-04-13

申请号：US17732811

申请日：2022-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghyuk YEOM ,  Seonghwa PARK ,  Kwanheum LEE ,  Sechan LIM

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/66

Abstract: A semiconductor device may include first and second active regions on a substrate, first and second insulating structures on the first and second active regions, respectively, vertically stacked channel layers on each of the first and second insulating structures, first and second gate structures intersecting the first and second active regions, respectively, and surrounding the channel layers, first and second source/drain regions doped with different conductivity-type impurities, the first and second source/drain regions being on sides of the first and second gate structures, respectively, and contacting the channel layers, and at least a portion of each of the first and second insulating structures extending upwardly along a side surface of a corresponding one of the first and second source/drain regions.

公开(公告)号：US20200279919A1

公开(公告)日：2020-09-03

申请号：US16875314

申请日：2020-05-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongki JUNG ,  Myungil KANG ,  Yoonhae KIM ,  Kwanheum LEE

IPC: H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

Abstract: A semiconductor device includes a substrate, a first active fin on the substrate, the first active fin including a first side surface and a second side surface opposing the first side surface, a second active fin on the substrate, the second active fin including a third side surface facing the second side surface and a fourth side surface opposing the third side surface of the second active fin, a first isolation layer on the first side surface of the first active fin, a second isolation layer between the second side surface of the first active fin and the third side surface of the second active fin, a third isolation layer on the fourth side surface of the second active fin and a merged source/drain on the first and second active fins.

公开(公告)号：US20180151671A1

公开(公告)日：2018-05-31

申请号：US15880969

申请日：2018-01-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongki JUNG ,  Myungil KANG ,  Yoonhae KIM ,  Kwanheum LEE

IPC: H01L29/08 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L27/088

CPC classification number: H01L29/0847 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, an active fin protruding from the substrate, and an asymmetric diamond-shaped source/drain disposed on an upper surface of the active fin. The source/drain includes a first crystal growth portion and a second crystal growth portion sharing a plane with the first crystal growth portion and having a lower surface disposed at a lower level than a lower surface of the first crystal growth portion.