公开(公告)号：US09245995B2

公开(公告)日：2016-01-26

申请号：US13921412

申请日：2013-06-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-june Jang ,  Kyu-heon Cho ,  Min-hwan Kim ,  Dong-eun Jang ,  Hoon Chang

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06 ,  H01L29/49 ,  H01L29/08

CPC classification number: H01L29/7816 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/4983 ,  H01L29/66681

Abstract: A semiconductor device includes a power metal-oxide-semiconductor (MOS) transistor including a semiconductor substrate, an impurity region on the semiconductor substrate, the impurity region having a first conductivity, a drift region in the impurity region, the drift region having the first conductivity, a body region in the impurity region adjacent to the drift region, the body region having a second conductivity different from the first conductivity, a drain extension insulating layer on the drift region, a gate insulating layer and a gate electrode sequentially stacked across a portion of the body region and a portion of the drift region, a drain extension electrode on the drain extension insulating layer, a drain region contacting a side of the drift region opposite to the body region, the drain region having the first conductivity, and a source region in the body region, the source region having the second conductivity.

Abstract translation: 半导体器件包括：包含半导体衬底的功率金属氧化物半导体（MOS）晶体管，半导体衬底上的杂质区域，具有第一导电性的杂质区域，杂质区域中的漂移区域，具有第一 电导率，与漂移区相邻的杂质区域中的体区，具有不同于第一导电性的第二电导率的体区，漂移区上的漏极延伸绝缘层，顺序地层叠在栅极绝缘层上的栅电极 所述体区的一部分和所述漂移区的一部分，所述漏极延伸绝缘层上的漏极延伸电极，与所述体区的相反侧的所述漂移区的漏极区域，所述漏极区具有所述第一导电性，以及 源区域，源区域具有第二导电性。

公开(公告)号：US10153397B2

公开(公告)日：2018-12-11

申请号：US15689220

申请日：2017-08-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-seok Choi ,  Min-ho Kim ,  Jeong-wook Lee ,  Jai-won Jean ,  Chul-min Kim ,  Jae-deok Jeong ,  Min-hwan Kim ,  Jang-mi Kim

IPC: H01L33/14 ,  H01L33/06 ,  H01L27/15 ,  H01L33/32 ,  H01L33/02 ,  H01L33/30

Abstract: A semiconductor light-emitting device includes a first conductive semiconductor layer on a substrate, a superlattice layer including a plurality of first quantum barrier layers and a plurality of first quantum well layers, the plurality of first quantum barrier layers and the plurality of first quantum well layers being alternately stacked on the first conductive semiconductor layer, an active layer on the superlattice layer, and a second conductive semiconductor layer on the active layer, wherein a Si doping concentration of at least one of the plurality of first quantum well layers is equal to or greater than 1.0×1016/cm3 and less than or equal to 1.0×1018/cm3. Thus, the semiconductor light-emitting device may have increased light output and reliability.