公开(公告)号：US20240105789A1

公开(公告)日：2024-03-28

申请号：US18319014

申请日：2023-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WONHYUK LEE ,  SANGDUK PARK ,  DONGSOO SEO ,  JINWOOK LEE

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/775

CPC classification number: H01L29/41775 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/456 ,  H01L29/775

Abstract: Embodiments of the present inventive concepts provide a semiconductor device including a substrate that includes an active pattern, a channel pattern disposed on the active pattern, a first source/drain pattern and a second source/drain pattern that are connected to the plurality of semiconductor patterns, a gate electrode disposed on the plurality of semiconductor patterns, and a first active contact electrically connected to the first source/drain pattern and a second active contact electrically connected to the second source/drain pattern. In one aspect, the channel pattern includes a plurality of semiconductor patterns that are spaced apart from and vertically stacked on each other. In one aspect, the gate electrode includes inner electrodes disposed between neighboring semiconductor patterns of the plurality of semiconductor patterns and an outer electrode disposed on an uppermost semiconductor pattern.

公开(公告)号：US20190333823A1

公开(公告)日：2019-10-31

申请号：US16503728

申请日：2019-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonhyuk LEE ,  JEONGYUN LEE ,  Yongseok LEE ,  Bosoon KIM ,  SANGDUK PARK ,  Seungchul OH ,  YOUNGMOOK OH

IPC: H01L21/8234 ,  H01L29/08 ,  H01L27/088 ,  H01L21/762

Abstract: A semiconductor device includes a device isolation layer provided on a substrate, the device isolation layer defining first and second sub-active patterns, first and second gate electrodes crossing the first and second sub-active patterns, respectively, and an isolation structure provided on the device isolation layer between the first and second sub-active patterns. The first and second sub-active patterns extend in a first direction and are spaced apart from each other in the first direction. The device isolation layer includes a diffusion break region disposed between the first and second sub-active patterns. The isolation structure covers a top surface of the diffusion break region.

公开(公告)号：US20220122891A1

公开(公告)日：2022-04-21

申请号：US17562802

申请日：2021-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonhyuk LEE ,  JEONGYUN LEE ,  Yongseok LEE ,  Bosoon KIM ,  SANGDUK PARK ,  Seungchul OH ,  YOUNGMOOK OH

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/08

Abstract: A semiconductor device includes a device isolation layer provided on a substrate, the device isolation layer defining first and second sub-active patterns, first and second gate electrodes crossing the first and second sub-active patterns, respectively, and an isolation structure provided on the device isolation layer between the first and second sub-active patterns. The first and second sub-active patterns extend in a first direction and are spaced apart from each other in the first direction. The device isolation layer includes a diffusion break region disposed between the first and second sub-active patterns. The isolation structure covers a top surface of the diffusion break region.

公开(公告)号：US20170200651A1

公开(公告)日：2017-07-13

申请号：US15405420

申请日：2017-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonhyuk LEE ,  JEONGYUN LEE ,  Yongseok LEE ,  Bosoon KIM ,  SANGDUK PARK ,  Seungchul OH ,  YOUNGMOOK OH

IPC: H01L21/8234 ,  H01L21/762 ,  H01L29/08 ,  H01L27/088

CPC classification number: H01L21/823481 ,  H01L21/76224 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823456 ,  H01L21/823814 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0847

Abstract: A semiconductor device includes a device isolation layer provided on a substrate, the device isolation layer defining first and second sub-active patterns, first and second gate electrodes crossing the first and second sub-active patterns, respectively, and an isolation structure provided on the device isolation layer between the first and second sub-active patterns. The first and second sub-active patterns extend in a first direction and are spaced apart from each other in the first direction. The device isolation layer includes a diffusion break region disposed between the first and second sub-active patterns. The isolation structure covers a top surface of the diffusion break region.