公开(公告)号：US20180240710A1

公开(公告)日：2018-08-23

申请号：US15959319

申请日：2018-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONGWOO HAN ,  KWANG-YONG YANG ,  JINWOOK LEE ,  KYUNGYUB JEON ,  HAEGEON JUNG ,  DOHYOUNG KIM

IPC: H01L21/8234 ,  H01L21/306 ,  H01L29/66 ,  H01L27/088

Abstract: A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate, forming first and second gate structures on the first and second active patterns, respectively, forming a coating layer to cover the first and second gate structures and the first and second active patterns, and forming a first recess region in the first active pattern between the first gate structures and a second recess region in the second active pattern between the second gate structures.

公开(公告)号：US20200110547A1

公开(公告)日：2020-04-09

申请号：US16416750

申请日：2019-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANGWOO LEE ,  CHANHA KIM ,  YUNJUNG LEE ,  JISOO KIM ,  SEUNGKYUNG RO ,  JINWOOK LEE ,  HEEWON LEE

IPC: G06F3/06 ,  G11C16/04 ,  G11C16/26 ,  G06F11/10 ,  G11C29/52 ,  G06N20/00

Abstract: A storage device includes a nonvolatile memory device including a plurality of memory blocks, each including a plurality of memory cells connected to a plurality of word lines, and a controller configured to perform a first read operation on memory cells connected to a selected word line included in a selected memory block based on a request of an external host device. The controller is further configured to perform a check read operation that checks a reliability of the memory cells of the selected memory block after performing the first read operation. In the check read operation, the controller is further configured to select and perform one of an actual check and a machine learning-based check.

公开(公告)号：US20220254928A1

公开(公告)日：2022-08-11

申请号：US17529406

申请日：2021-11-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： HONGSIK SHIN ,  WONHYUK LEE ,  DONGKWON KIM ,  JINWOOK LEE

IPC: H01L29/78 ,  H01L29/08 ,  H01L27/088

Abstract: Semiconductor devices may include a substrate, an active region that is on the substrate and extends in a first direction, a gate structure that traverses the active region and extends in a second direction that may be different from the first direction, a source/drain region on the active region adjacent a side of the gate structure, an insulating layer on the substrate, the gate structure and the source/drain region, and a contact structure that is in the insulating layer and is connected to the source/drain region. In the source/drain region, a contact region that is in contact with the contact structure includes first and second side regions spaced apart from each other in the second direction and a central region between the first and second side regions, and at least one of the first and second side regions may include a recess.

公开(公告)号：US20170084493A1

公开(公告)日：2017-03-23

申请号：US15260952

申请日：2016-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONGWOO HAN ,  KWANG-YONG YANG ,  JINWOOK LEE ,  KYUNGYUB JEON ,  HAEGEON JUNG ,  DOHYOUNG KIM

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/306 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/30604 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/6656 ,  H01L29/66795

Abstract: A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate, forming first and second gate structures on the first and second active patterns, respectively, forming a coating layer to cover the first and second gate structures and the first and second active patterns, and forming a first recess region in the first active pattern between the first gate structures and a second recess region in the second active pattern between the second gate structures.

公开(公告)号：US20250029494A1

公开(公告)日：2025-01-23

申请号：US18439339

申请日：2024-02-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINWOOK LEE

IPC: G08G1/14

Abstract: The present disclosure relates to storage management systems. An example storage management system includes a storage manager and a storage. The storage manager generates a storage management command based on location data of a car including information about a real-time location of the car and parking data including information about a parking place. The storage is inside the car and includes a nonvolatile memory device. The storage performs a memory management operation for preventing data loss of the nonvolatile memory device based on the storage management command.

公开(公告)号：US20240162278A1

公开(公告)日：2024-05-16

申请号：US18367915

申请日：2023-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOOHO JUNG ,  JINWOOK LEE ,  JONGYEONG MIN ,  JIYE BAEK ,  YESEUL LEE

IPC: H01G4/012 ,  H01G4/08 ,  H10B12/00

CPC classification number: H01L28/75 ,  H01G4/012 ,  H01G4/085 ,  H01L28/87 ,  H01L28/91 ,  H10B12/315 ,  H10B12/0335

Abstract: A capacitor structure includes; a lower electrode, a dielectric pattern on the lower electrode, an interface structure on the dielectric pattern, and an upper electrode on the interface structure. The dielectric pattern includes an oxide of a metal having 4 valence electrons. The interface structure includes a first interface pattern including a first metal oxide doped with nitrogen, and a second interface including a second metal oxide.

公开(公告)号：US20240105789A1

公开(公告)日：2024-03-28

申请号：US18319014

申请日：2023-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WONHYUK LEE ,  SANGDUK PARK ,  DONGSOO SEO ,  JINWOOK LEE

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/775

CPC classification number: H01L29/41775 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/456 ,  H01L29/775

Abstract: Embodiments of the present inventive concepts provide a semiconductor device including a substrate that includes an active pattern, a channel pattern disposed on the active pattern, a first source/drain pattern and a second source/drain pattern that are connected to the plurality of semiconductor patterns, a gate electrode disposed on the plurality of semiconductor patterns, and a first active contact electrically connected to the first source/drain pattern and a second active contact electrically connected to the second source/drain pattern. In one aspect, the channel pattern includes a plurality of semiconductor patterns that are spaced apart from and vertically stacked on each other. In one aspect, the gate electrode includes inner electrodes disposed between neighboring semiconductor patterns of the plurality of semiconductor patterns and an outer electrode disposed on an uppermost semiconductor pattern.