公开(公告)号：US20150364574A1

公开(公告)日：2015-12-17

申请号：US14579627

申请日：2014-12-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn KIM ,  Dong-Hyun ROH ,  Sang-Duk PARK ,  Il-Young YOON ,  Jeong-Nam HAN ,  Jong-Mil YOUN

IPC: H01L29/66 ,  H01L21/3105 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/3213 ,  H01L27/088 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L29/66545 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/66636

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure including a dummy gate insulation layer pattern, a dummy gate electrode and a gate mask sequentially stacked are formed on a substrate. An interlayer insulating layer including tonen silazane (TOSZ) is formed on the substrate to cover the dummy gate structure. An upper portion of the interlayer insulating layer is planarized until a top surface of the gate mask is exposed to form an interlayer insulating layer pattern. The exposed gate mask, and the dummy gate electrode and the dummy gate insulation layer pattern under the gate mask are removed to form an opening exposing a top surface of the substrate. The dummy gate insulation layer pattern is removed using an etchant including hydrogen fluoride (HF), but the interlayer insulating layer pattern remains. A gate structure is formed to fill the opening.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成包括虚拟栅极绝缘层图案，虚拟栅极电极和栅极掩模的虚拟栅极结构。 在基板上形成包含蒙片硅氮烷（TOSZ）的层间绝缘层，以覆盖虚拟栅极结构。 层间绝缘层的上部被平坦化，直到露出栅极掩模的顶表面以形成层间绝缘层图案。 除去栅极掩模下的露出的栅极掩模，伪栅极电极和伪栅极绝缘层图案，以形成露出衬底顶表面的开口。 使用包括氟化氢（HF）的蚀刻剂去除伪栅极绝缘层图案，但是残留层间绝缘层图案。 形成浇口结构以填充开口。