公开(公告)号：US20210217635A1

公开(公告)日：2021-07-15

申请号：US17215928

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-hoo Kim ,  Sang-jine PARK ,  Yong-jhin CHO ,  Yeon-jin GIL ,  Ji-hoon JEONG ,  Byung-kwon CHO ,  Yong-sun KO ,  Kun-tack LEE

IPC: H01L21/67 ,  H01L21/687

Abstract: A substrate processing apparatus includes a vessel providing a processing space for processing a substrate, a substrate support supporting the substrate loaded in the processing space, and a barrier between a side wall of the vessel and the substrate support and surrounding an edge of the substrate supported by the substrate support.

公开(公告)号：US20180358242A1

公开(公告)日：2018-12-13

申请号：US15827144

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-hoo Kim ,  Sang-jine PARK ,  Yong-jhin CHO ,  Yeon-jin GIL ,  Ji-hoon JEONG ,  Byung-kwon CHO ,  Yong-sun KO ,  Kun-tack LEE

IPC: H01L21/67 ,  H01L21/687

CPC classification number: H01L21/67034 ,  H01L21/02101 ,  H01L21/67126 ,  H01L21/68735

Abstract: A substrate processing apparatus includes a vessel providing a processing space for processing a substrate, a substrate support supporting the substrate loaded in the processing space, and a barrier between a side wall of the vessel and the substrate support and surrounding an edge of the substrate supported by the substrate support.

公开(公告)号：US20180254246A1

公开(公告)日：2018-09-06

申请号：US15697881

申请日：2017-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-jine PARK ,  Kee-sang KWON ,  Jae-jik BAEK ,  Yong-sun KO ,  Kwang-wook LEE

IPC: H01L23/532 ,  H01L23/522 ,  H01L29/78 ,  H01L21/768 ,  H01L21/285

CPC classification number: H01L23/53204 ,  H01L21/28518 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76889 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53209 ,  H01L29/41791 ,  H01L29/785

Abstract: An integrated circuit device includes an insulating film on a substrate, a lower wiring layer penetrating at least a portion of the insulating film, the lower wiring layer including a first metal, a lower conductive barrier film surrounding a bottom surface and a sidewall of the lower wiring layer, the lower conductive barrier film including a second metal different from the first metal, a first metal silicide capping layer covering a top surface of the lower wiring layer, the first metal silicide capping layer including the first metal, and a second metal silicide capping layer contacting the first metal silicide capping layer and disposed on the lower conductive barrier film, the second metal silicide capping layer including the second metal.