公开(公告)号：US20240145573A1

公开(公告)日：2024-05-02

申请号：US18382166

申请日：2023-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ilgyou Shin ,  Hyunho Noh ,  Sanghyun Hong ,  Sangyong Kim ,  HyungJun Kim

IPC: H01L29/51 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/517 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes a first transistor on a first region of a substrate, and a second transistor on a second region of the substrate. The first transistor includes a first gate insulating layer including a first interfacial insulating layer, a first lower high-κ dielectric layer, and a first composite dielectric layer, sequentially stacked on each of first semiconductor channel layers. The second transistor includes a second gate insulating layer including a second interfacial insulating layer, a second lower high-κ dielectric layer, a second composite dielectric layer, and a second upper high-κ dielectric layer, sequentially stacked on each of second semiconductor channel layers. The first and the second lower high-κ dielectric layers include a first metal element, the second upper high-κ dielectric layer includes a second metal element, and the first and the second composite dielectric layers include both of the first and the second metal elements.

公开(公告)号：US09118010B2

公开(公告)日：2015-08-25

申请号：US14328056

申请日：2014-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Hong ,  Jaekyu Lee ,  Yong Kwan Kim

IPC: H01L45/00 ,  H01L27/10 ,  H01L27/24 ,  H01L27/22

CPC classification number: H01L45/1683 ,  H01L27/101 ,  H01L27/224 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1273 ,  H01L45/1608 ,  H01L45/1675

Abstract: According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.

Abstract translation: 根据示例性实施例，可变电阻存储器件包括下电极，其包括间隔物形的第一副下电极和覆盖第一副下电极的弯曲侧壁的第二副下电极。 第二副下电极向上延伸以突出在第一子下电极的顶部之上。 下电极包括向上锥形的形状。