公开(公告)号：US09722672B2

公开(公告)日：2017-08-01

申请号：US15398970

申请日：2017-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwoo Kim ,  Junho Kim ,  Seok-Hyun Kim ,  Hangseok Choi

IPC: H04B5/00 ,  H04B1/10

CPC classification number: H04B5/0062 ,  H04B1/1018 ,  H04B5/0025

Abstract: A calibrator to process an output signal of an analog digital converter in a wireless communication device, the calibrator comprising a level filter to remove noise from the output signal of the analog digital converter using mask information regulating a signal level; a timing filter to remove pulses from the level-filtered signal that are beyond a reference duty ratio by using timing information; a pattern filter to remove pulses from the timing-filtered signal that are judged to not comprise a reference number of consecutive pulses by using pattern information; and a duty correction circuit to correct a duty of the pattern-filtered signal to improve performance of the wireless communication device by separately performing a filtering operation on noise and a damping component included in a normal signal.

公开(公告)号：US09571141B2

公开(公告)日：2017-02-14

申请号：US14672710

申请日：2015-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwoo Kim ,  Junho Kim ,  Seok-Hyun Kim ,  Hangseok Choi

IPC: H04B5/00 ,  H04B1/10

CPC classification number: H04B5/0062 ,  H04B1/1018 ,  H04B5/0025

Abstract: A calibrator to process an output signal of an analog digital converter in a wireless communication device, the calibrator comprising a level filter to remove noise from the output signal of the analog digital converter using mask information regulating a signal level; a timing filter to remove pulses from the level-filtered signal that are beyond a reference duty ratio by using timing information; a pattern filter to remove pulses from the timing-filtered signal that are judged to not comprise a reference number of consecutive pulses by using pattern information; and a duty correction circuit to correct a duty of the pattern-filtered signal to improve performance of the wireless communication device by separately performing a filtering operation on noise and a damping component included in a normal signal.

Abstract translation: 一种用于在无线通信设备中处理模拟数字转换器的输出信号的校准器，所述校准器包括电平滤波器，以使用调节信号电平的掩模信息从模拟数字转换器的输出信号中去除噪声; 定时滤波器，通过使用定时信息从超过参考占空比的电平滤波信号中去除脉冲; 模式滤波器，用于通过使用模式信息来从判定为不包括参考数量的连续脉冲的定时滤波信号中去除脉冲; 以及负责校正电路，用于通过分别执行噪声滤波操作和包括在正常信号中的阻尼分量来校正模式滤波信号的占空比，以提高无线通信装置的性能。

公开(公告)号：US10289601B1

公开(公告)日：2019-05-14

申请号：US16018334

申请日：2018-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-seok Kim ,  Seok-Hyun Kim ,  Tae Seon Kim ,  Min-Woo Lee

IPC: G06F13/42 ,  G06F13/364 ,  H04L7/00 ,  H04L12/403

Abstract: A host controller, a secure element, and a serial peripheral interface communications system are provided. The host controller is configured to connect to a secure element via a serial peripheral interface and includes: a resume signal generator configured to generate a first resume signal indicating a start of communication with the secure element; a transmitter configured to transmit the first resume signal to the secure element; a slave select line activator configured to activate a slave select line after the first resume signal is transmitted; and a clock controller configured to transmit a first clock signal to the secure element over a clock line based on the slave select line being activated, and the transmitter is further configured to transmit a first signal containing first data to the secure element over a master-out slave-in line (an MOSI line) while the first clock signal is being transmitted.

公开(公告)号：US20170117942A1

公开(公告)日：2017-04-27

申请号：US15398970

申请日：2017-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwoo KIM ,  Junho Kim ,  Seok-Hyun Kim ,  Hangseok Choi

IPC: H04B5/00 ,  H04B1/10

CPC classification number: H04B5/0062 ,  H04B1/1018 ,  H04B5/0025

Abstract: A calibrator to process an output signal of an analog digital converter in a wireless communication device, the calibrator comprising a level filter to remove noise from the output signal of the analog digital converter using mask information regulating a signal level; a timing filter to remove pulses from the level-filtered signal that are beyond a reference duty ratio by using timing information; a pattern filter to remove pulses from the timing-filtered signal that are judged to not comprise a reference number of consecutive pulses by using pattern information; and a duty correction circuit to correct a duty of the pattern-filtered signal to improve performance of the wireless communication device by separately performing a filtering operation on noise and a damping component included in a normal signal.

公开(公告)号：US10135497B2

公开(公告)日：2018-11-20

申请号：US15626252

申请日：2017-06-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junho Kim ,  Seok-Hyun Kim ,  Jaehun Choi

IPC: H04B5/00 ,  H04W4/80 ,  H03G3/30

Abstract: A near field communication device includes an amplifier that amplifies a signal received through an antenna and outputs the signal as an amplified receive signal, a gain control block that adjusts a gain of the amplifier based on a level of a noise included in the amplified receive signal during a noise reception sequence, and a data determination block that determines a noise threshold voltage based on the level of the noise of the amplified receive signal after the gain is completely adjusted and determines data from the amplified receive signal by using the noise threshold voltage.

公开(公告)号：US11251188B2

公开(公告)日：2022-02-15

申请号：US16990305

申请日：2020-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok-Hyun Kim ,  Joon Young Kang ,  Youngjun Kim ,  Jinhyung Park ,  Ho-Ju Song ,  Sang-Jun Lee ,  Hyeran Lee ,  Bong-Soo Kim ,  Sungwoo Kim

IPC: H01L27/088 ,  H01L21/00 ,  H01L27/108

Abstract: A semiconductor memory device including: a substrate including a cell array region and a boundary region; a first recess region at an upper portion of the substrate in the cell array region; a first bit line extending onto the boundary region and crossing the first recess region; a bit line contact in the first recess region and contacting the first bit line; a second bit line spaced apart from the first recess region and adjacent to the first bit line, the second bit line crossing the cell array region and the boundary region; a cell buried insulation pattern between a side surface of the first bit line contact and an inner wall of the first recess region; and a boundary buried insulation pattern covering sidewalls of the first bit line and the second bit line in the boundary region and including a same material as the cell buried insulation pattern.