公开(公告)号：US11921625B2

公开(公告)日：2024-03-05

申请号：US17752004

申请日：2022-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young Ji

IPC: G06F12/00 ,  G06F12/02

CPC classification number: G06F12/0238 ,  G06F2212/7203

Abstract: A storage device includes a controller configured to receive a pre-processing instruction command from an external device, a non-volatile memory configured to store an original graph data, and a buffer memory connected to the controller and the non-volatile memory, wherein the controller is configured to load the original graph data from the non-volatile memory, generate pre-processing graph data by classifying the original graph data depending on vector similarity in response to the pre-processing instruction command, generate metadata on the basis of the pre-processing graph data, and provide the pre-processing graph data and the metadata to the non-volatile memory, the non-volatile memory is configured to store the pre-processing graph data and the metadata in a data block, and the buffer memory is configured to buffer the original graph data, the pre-processing graph data, and the metadata.

公开(公告)号：US20230266992A1

公开(公告)日：2023-08-24

申请号：US18146366

申请日：2022-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Young Ji

IPC: G06F9/48 ,  G06F3/06

CPC classification number: G06F9/4831 ,  G06F3/0608 ,  G06F3/0652 ,  G06F3/0673

Abstract: A method for managing resources by using a processor that includes a first queue and a second queue includes receiving, by the processor, input/output commands from a virtual device, generating, by the processor, interrupts that each includes a process address space identifier (PASID) that corresponds to each of the input/output commands, storing, by the processor, the interrupts in the first queue, storing, by the processor, in a memory device, data that respectively corresponds to each of the interrupts, and storing, by the processor, in the second queue, location information indicating a storage location of the data stored in the memory device and size information indicating a size of the data.

公开(公告)号：US12111763B2

公开(公告)日：2024-10-08

申请号：US18086252

申请日：2022-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young Ji

IPC: G06F3/06 ,  G06F12/0815 ,  G06F12/0871

CPC classification number: G06F12/0815 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/067 ,  G06F12/0871

Abstract: An apparatus including: a plurality of compute express link (CXL) devices each including a memory and a processor for processing works stored in the memory; and a switch configured to connect the CXL devices to each other, wherein a first CXL device among the plurality of CXL devices selects at least one second CXL device from at least some CXL devices of the plurality of CXL devices to distribute works stored in a memory of the first CXL device based on a usable capacity of a memory of the at least some CXL devices.

公开(公告)号：US20230421513A1

公开(公告)日：2023-12-28

申请号：US18314341

申请日：2023-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hwa Jin ,  Min-Ho Kim ,  Dongouk Moon ,  Soo-Young Ji

IPC: H04L49/90 ,  H04L65/61 ,  H04L65/80

CPC classification number: H04L49/90 ,  H04L65/61 ,  H04L65/80

Abstract: A storage device includes a nonvolatile memory device, and a storage controller configured to control the nonvolatile memory device. The storage controller includes: (i) a quality of experience (QoE) manager configured to schedule a request received from an external user equipment, based on storage device information and network information, and (ii) a software-defined networking (SDN) manager configured to set a network transfer path to the external user equipment, which is associated with video data corresponding to the request.

公开(公告)号：US20250077104A1

公开(公告)日：2025-03-06

申请号：US18597292

申请日：2024-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunjoon YOO ,  Seo-Hyun Shin ,  Soo-Young Ji ,  Seunghan Lee

IPC: G06F3/06

Abstract: Provided is a system and method for migrating data. The method includes: receiving data, read count information about the data, and write count information about the data; selecting at least one memory block among a plurality of memory blocks based on a wear level of a plurality of memory blocks and the read count information and the write count information; and storing the data in the at least one memory block.

公开(公告)号：US20240220150A1

公开(公告)日：2024-07-04

申请号：US18341164

申请日：2023-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heeseok Eun ,  Seunghan Lee ,  Jinwook Lee ,  Soo-Young Ji

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: In a storage system, a first computational storage device may be configured to store first data used to execute a program, and a second computational storage device may be configured to store second data used to execute the program. The second computational storage device may be configured to receive the program offloaded from the host device, bring the first data from the first computational storage device, and execute the program using a plurality of data including the first data and the second data.

公开(公告)号：US11899941B2

公开(公告)日：2024-02-13

申请号：US17874734

申请日：2022-07-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Young Ji

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0653 ,  G06F3/0679

Abstract: A storage device is provided. A storage device includes a non-volatile memory including a plurality of memory segments, and a storage controller connected to the non-volatile memory through a plurality of channels, each of the plurality of channels connected to a respective one of the plurality of memory segments such that each of the plurality of channels has a respective associated memory segment, wherein the storage controller is configured to generate parity according to speed information received from a host with respect to data to be written to the non-volatile memory and store the parity in at least one of the memory segments.

公开(公告)号：US20250156235A1

公开(公告)日：2025-05-15

申请号：US18673093

申请日：2024-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young Ji

IPC: G06F9/50 ,  G06F12/1045

Abstract: Disclosed is a method which is performed by a controller of a storage device including a nonvolatile memory. The method includes constructing, at the controller, a data structure including at least one of performance information of the storage device and network routing information about a network where the storage device is located, and transmitting, at the controller, the data structure to the host device based on a cache coherence protocol.

公开(公告)号：US12277328B2

公开(公告)日：2025-04-15

申请号：US18484000

申请日：2023-10-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghan Lee ,  Heeseok Eun ,  Kyungkeun Lee ,  Soo-Young Ji

IPC: G06F3/06 ,  G06F11/30

Abstract: An electronic device includes a host device and a plurality of storage devices. The host device includes a processor and a baseboard management controller (BMC). Each of the plurality of storage devices includes a storage controller and a micro controller unit (MCU). The processor and the storage controller support in-band communication, and the BMC and the MCU support out-of-band communication. The BMC receives monitoring data from the MCU of each of the plurality of storage devices based on the out-of-band communication. The processor allocates a first workload among one or more workloads to a first storage device among the plurality of storage devices, based on a monitoring data set including the monitoring data. The first storage device executes the first workload based on the in-band communication.

公开(公告)号：US20250028482A1

公开(公告)日：2025-01-23

申请号：US18649187

申请日：2024-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young Ji ,  Seo-Hyun Shin ,  Hyun Joon Yoo ,  Seung Han Lee

IPC: G06F3/06 ,  G06F13/42

Abstract: A storage system includes: a first device connected to a host through an interface including a first and second switches; and a second device connected to the host through the interface. The first device includes: a first controller; a first memory; and a first shared memory including information about a first degradation of the first memory. The second device includes: a second controller; a second memory; and a second shared memory including information about a second degradation of the second memory, the second shared memory being accessible by the first controller through the first switch, and wherein the first controller is configured to: receive a command related to an operation of the first memory from the host, and control the second controller to perform the command, instead of the first controller, based on identifying that the first degradation is higher than the second degradation.