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Patent Agency Ranking
公开(公告)号：US20140223085A1
公开(公告)日：2014-08-07
申请号：US14162928
申请日：2014-01-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungkyu Jo , Jinyub Lee
IPC: G06F12/02
CPC classification number: G11C16/225 , G11C16/10 , G11C16/30
Abstract: A memory system is provided which includes a nonvolatile memory; and a controller configured to control the nonvolatile memory, wherein the controller comprises a voltage detector configured to detect a level of a power supply voltage; and wherein when a level of the power supply voltage is lower than a first threshold value, the controller issues a reset command to the nonvolatile memory and then performs a reset operation.
Abstract translation: 提供一种包括非易失性存储器的存储器系统; 以及控制器，被配置为控制所述非易失性存储器，其中所述控制器包括被配置为检测电源电压的电平的电压检测器; 并且其中当所述电源电压的电平低于第一阈值时，所述控制器向所述非易失性存储器发出复位命令，然后执行复位操作。
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公开(公告)号：US20220359007A1
公开(公告)日：2022-11-10
申请号：US17546304
申请日：2021-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungkyu Jo
IPC: G11C13/00
Abstract: A memory device includes a cell region including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines disposed therein, where each of the plurality of memory cells includes a switch element and a memory element connected to each other in series between a corresponding word line and a corresponding bit line, and a peripheral circuit region including a control logic configured to, when a read command for a selected memory cell among the memory cells is received from an external controller, input a pre-voltage to the selected memory cell before reading data of the selected memory cell. The control logic is configured to determine a level of the pre-voltage with reference to an elapsed time after programming of the selected memory cell.
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公开(公告)号：US12159666B2
公开(公告)日：2024-12-03
申请号：US17546304
申请日：2021-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungkyu Jo
Abstract: A memory device includes a cell region including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines disposed therein, where each of the plurality of memory cells includes a switch element and a memory element connected to each other in series between a corresponding word line and a corresponding bit line, and a peripheral circuit region including a control logic configured to, when a read command for a selected memory cell among the memory cells is received from an external controller, input a pre-voltage to the selected memory cell before reading data of the selected memory cell. The control logic is configured to determine a level of the pre-voltage with reference to an elapsed time after programming of the selected memory cell.
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4.发明授权公开(公告)号：US11631458B2
公开(公告)日：2023-04-18
申请号：US17322078
申请日：2021-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungkyu Jo
Abstract: A memory device includes a cell area in which a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines are disposed, each of the plurality of memory cells including an Ovonic threshold switch element and a memory element connected to each other in series, and a peripheral circuit area including at least one peripheral circuit, configured to input a first refresh voltage turning on the Ovonic threshold switch element to each of at least some refresh cells among the plurality of memory cells to execute a refresh operation, determine each of the refresh cells as a first refresh cell in a first state or a second refresh cell in a second state while the Ovonic threshold switch element is turned on, and input a second refresh voltage, different to the first refresh voltage, to the second refresh cell.
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公开(公告)号：US09390805B2
公开(公告)日：2016-07-12
申请号：US14162928
申请日：2014-01-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungkyu Jo , Jinyub Lee
CPC classification number: G11C16/225 , G11C16/10 , G11C16/30
Abstract: A memory system is provided which includes a nonvolatile memory; and a controller configured to control the nonvolatile memory, wherein the controller comprises a voltage detector configured to detect a level of a power supply voltage; and wherein when a level of the power supply voltage is lower than a first threshold value, the controller issues a reset command to the nonvolatile memory and then performs a reset operation.
Abstract translation: 提供一种包括非易失性存储器的存储器系统; 以及控制器，被配置为控制所述非易失性存储器，其中所述控制器包括被配置为检测电源电压的电平的电压检测器; 并且其中当所述电源电压的电平低于第一阈值时，所述控制器向所述非易失性存储器发出复位命令，然后执行复位操作。
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