Abstract:
A memory system is provided which includes a nonvolatile memory; and a controller configured to control the nonvolatile memory, wherein the controller comprises a voltage detector configured to detect a level of a power supply voltage; and wherein when a level of the power supply voltage is lower than a first threshold value, the controller issues a reset command to the nonvolatile memory and then performs a reset operation.
Abstract:
An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.
Abstract:
An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.
Abstract:
A nonvolatile memory device includes a memory cell array and a read/write circuit connected to the memory cell array through bit lines. The read method of the nonvolatile memory device includes receiving a security read request, receiving security information, and executing a security read operation in response to the security read request. The security read operation includes reading of security data from the memory cell array using the read/write circuit, storing of the read security data in a register, performing security decoding on the read security data stored in the register using the received security information, resetting the read/write circuit, and outputting a result of the security decoding.
Abstract:
A memory system is provided which includes a nonvolatile memory; and a controller configured to control the nonvolatile memory, wherein the controller comprises a voltage detector configured to detect a level of a power supply voltage; and wherein when a level of the power supply voltage is lower than a first threshold value, the controller issues a reset command to the nonvolatile memory and then performs a reset operation.