公开(公告)号：US20210366910A1

公开(公告)日：2021-11-25

申请号：US17395778

申请日：2021-08-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Krishna Kumar BHUWALKA ,  Kyoung Min CHOI ,  Takeshi OKAGAKI ,  Dong Won KIM ,  Jong Chol KIM

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/423 ,  H01L29/10 ,  H01L29/06

Abstract: A semiconductor device includes channel layers on a substrate, the channel layers being spaced apart from each other, and having first side surfaces and second side surfaces opposing each other in a first direction, a gate electrode surrounding the channel layers and having a first end portion and a second end portion, opposing each other in the first direction, and a source/drain layer on a first side of the gate electrode and in contact with the channel layers, a portion of the source/drain layer protruding further than the first end portion of the gate electrode in the first direction, wherein a first distance from the first end portion of the gate electrode to the first side surfaces of the channel layers is shorter than a second distance from the second end portion of the gate electrode to the second side surfaces of the channel layers.

公开(公告)号：US20230261079A1

公开(公告)日：2023-08-17

申请号：US17987126

申请日：2022-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunghyun SONG ,  Pilkwang KIM ,  Joohyung YOU ,  Sungmin KIM ,  Yonghee PARK ,  Young-Seok SONG ,  Takeshi OKAGAKI

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/42392 ,  H01L29/78696 ,  H01L29/0847 ,  H01L29/6656

Abstract: Disclosed are semiconductor devices and fabrication methods thereof. The semiconductor device includes a substrate including first and second regions, a device isolation pattern in the substrate, a lower separation dielectric pattern on the first region of the substrate, first channel patterns on the lower separation dielectric pattern, a first gate electrode on the first channel patterns and including a first gate part between the lower separation dielectric pattern and a lowermost first channel pattern, and first source/drain patterns on opposite sides of the first gate electrode and in contact with lateral surfaces of the first channel patterns. A bottom surface of the lower separation dielectric pattern is at a level higher than or equal to that of a bottom surface of the device isolation pattern. A top end of the lower separation dielectric pattern is at a level higher than that of a bottom surface of the first gate part.

公开(公告)号：US20240128268A1

公开(公告)日：2024-04-18

申请号：US18535274

申请日：2023-12-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Krishna Kumar BHUWALKA ,  Kyoung Min CHOI ,  Takeshi OKAGAKI ,  Dong Won KIM ,  Jong Chol KIM

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L27/0928 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/7831 ,  H01L29/7854 ,  H01L29/78696

Abstract: A semiconductor device includes channel layers on a substrate, the channel layers being spaced apart from each other, and having first side surfaces and second side surfaces opposing each other in a first direction, a gate electrode surrounding the channel layers and having a first end portion and a second end portion, opposing each other in the first direction, and a source/drain layer on a first side of the gate electrode and in contact with the channel layers, a portion of the source/drain layer protruding further than the first end portion of the gate electrode in the first direction, wherein a first distance from the first end portion of the gate electrode to the first side surfaces of the channel layers is shorter than a second distance from the second end portion of the gate electrode to the second side surfaces of the channel layers.

公开(公告)号：US20200066725A1

公开(公告)日：2020-02-27

申请号：US16358989

申请日：2019-03-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Krishna Kumar BHUWALKA ,  Kyoung Min CHOI ,  Takeshi OKAGAKI ,  Dong Won KIM ,  Jong Chol KIM

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423

Abstract: A semiconductor device includes channel layers on a substrate, the channel layers being spaced apart from each other, and having first side surfaces and second side surfaces opposing each other in a first direction, a gate electrode surrounding the channel layers and having a first end portion and a second end portion, opposing each other in the first direction, and a source/drain layer on a first side of the gate electrode and in contact with the channel layers, a portion of the source/drain layer protruding further than the first end portion of the gate electrode in the first direction, wherein a first distance from the first end portion of the gate electrode to the first side surfaces of the channel layers is shorter than a second distance from the second end portion of the gate electrode to the second side surfaces of the channel layers.