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公开(公告)号:US10062732B2
公开(公告)日:2018-08-28
申请号:US15272413
申请日:2016-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dmytro Apalkov , Mohamad Krounbi , Vladimir Nikitin , Volodymyr Voznyuk
CPC classification number: H01L27/222 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
Abstract: A magnetic memory device comprises a first reference magnetic layer, a first tunnel barrier layer, a second tunnel barrier layer, and a free magnetic layer disposed between the first tunnel barrier layer and the second tunnel barrier layer. A magnitude of an in-plane magnetostatic field from the first reference magnetic layer at an edge of the free magnetic layer is less than about 500 Oe. One embodiment comprises a second reference magnetic layer on the second tunnel barrier layer in which the first reference magnetic layer, the first tunnel barrier layer, the free magnetic layer, the second tunnel barrier layer and the second reference magnetic layer are arranged as a stack, and in which a width of the first tunnel barrier layer, the free magnetic layer, the second tunnel barrier and the second reference magnetic layer in a second direction is less than about 30 nm.
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公开(公告)号:US09666794B2
公开(公告)日:2017-05-30
申请号:US15081831
申请日:2016-03-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Volodymyr Voznyuk , Dustin Erickson
Abstract: An MTJ structure and method for providing the same are described. The method may include providing a free layer, a pinned layer, and a nonmagnetic spacer layer between the free layer and the pinned layer. Providing the free layer and/or the pinned layer may include depositing a portion of the desired MTJ layer, depositing a sacrificial layer, annealing the MTJ and sacrificial layer, removing at least a portion of the sacrificial layer, and depositing a remaining portion of the desired MTJ layer. The steps of depositing a sacrificial layer, annealing, and removing the sacrificial layer may be repeated multiple times with process conditions selected for each stage so as to reduce the risk of damage to the underlying MTJ layer. The desired MTJ layer may be the free layer, the pinned layer, or both.
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公开(公告)号:US10274571B2
公开(公告)日:2019-04-30
申请号:US15478226
申请日:2017-04-03
Applicant: Samsung Electronics Co., LTD.
Inventor: Robert Beach , Dmytro Apalkov , Volodymyr Voznyuk , Ilya Krivorotov , Chengcen Sha
IPC: G01R33/60 , H01L27/22 , H01L43/08 , G11C11/02 , H01L43/12 , G01N24/10 , G11C29/02 , G11C29/24 , G11C29/50 , G11C11/16
Abstract: A method and apparatus determine an exchange stiffness of a free layer residing in a magnetic junction. The method includes performing spin torque ferromagnetic resonance (ST-FMR) measurements for the magnetic junction. The ST-FMR measurements indicate characteristic frequencies corresponding to spin wave modes in the free layer. The method also includes calculating the exchange stiffness of the free layer based upon the plurality of characteristic frequencies. In some embodiments, the magnetic junction resides on a wafer including other magnetic junctions for a device. The magnetic junctions may be arranged as a magnetic memory. The magnetic junction undergoing ST-FMR has a different aspect ratio than the magnetic junctions.
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公开(公告)号:US20180205001A1
公开(公告)日:2018-07-19
申请号:US15478226
申请日:2017-04-03
Applicant: Samsung Electronics Co., LTD.
Inventor: Robert Beach , Dmytro Apalkov , Volodymyr Voznyuk , Ilya Krivorotov , Chengcen Sha
CPC classification number: G01R33/60 , G01N24/10 , G11C11/02 , G11C11/1675 , G11C29/021 , G11C29/028 , G11C29/24 , G11C29/50008 , G11C2029/5006 , H01L27/222 , H01L43/08 , H01L43/12
Abstract: A method and apparatus determine an exchange stiffness of a free layer residing in a magnetic junction. The method includes performing spin torque ferromagnetic resonance (ST-FMR) measurements for the magnetic junction. The ST-FMR measurements indicate characteristic frequencies corresponding to spin wave modes in the free layer. The method also includes calculating the exchange stiffness of the free layer based upon the plurality of characteristic frequencies. In some embodiments, the magnetic junction resides on a wafer including other magnetic junctions for a device. The magnetic junctions may be arranged as a magnetic memory. The magnetic junction undergoing ST-FMR has a different aspect ratio than the magnetic junctions.
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