公开(公告)号：US09041122B2

公开(公告)日：2015-05-26

申请号：US14267008

申请日：2014-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-seok Yoo ,  Young-seok Kim ,  Han-jin Lim ,  Jeon-Il Lee

IPC: H01L29/417 ,  H01L29/45 ,  H01L21/764 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/5225 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76879 ,  H01L21/76892 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and a method of manufacturing the semiconductor device. In order to improve reliability by solving a problem of conductivity that may occur when an air spacer structure that may reduce a capacitor coupling phenomenon between a plurality of conductive lines is formed, there are provided a semiconductor device including: a substrate having an active region; a contact plug connected to the active region; a landing pad spacer formed to contact a top surface of the contact plug; a contact conductive layer formed to contact the top surface of the contact plug and formed in a space defined by the landing pad spacer; a metal silicide layer formed on the contact conductive layer; and a landing pad connected to the contact conductive layer in a state in which the metal silicide layer is disposed between the landing pad and the contact conductive layer, and a method of manufacturing the semiconductor device.

Abstract translation: 提供半导体器件和制造半导体器件的方法。 为了通过解决当形成能够减少多个导线之间的电容耦合现象的空气间隔结构时可能发生的导电性问题，为了提高可靠性，提供了一种半导体器件，包括：具有有源区的基板; 连接到活动区域的接触插塞; 形成为接触所述接触插塞的顶表面的着陆垫间隔件; 接触导电层，其形成为接触所述接触插塞的顶表面并形成在由所述着陆垫间隔件限定的空间中; 形成在所述接触导电层上的金属硅化物层; 以及在金属硅化物层设置在着陆焊盘和接触导电层之间的状态下连接到接触导电层的着陆焊盘以及制造半导体器件的方法。

公开(公告)号：US08928152B2

公开(公告)日：2015-01-06

申请号：US14186025

申请日：2014-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taek-soo Jeon ,  Bong-hyun Kim ,  Won-seok Yoo ,  Jae-hong Seo ,  Ho-kyun An ,  Dae-hyun Kim

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/10 ,  H01L21/768 ,  H01L23/522 ,  H01L27/108 ,  H01L21/285

CPC classification number: H01L23/5226 ,  H01L21/28525 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L27/10823 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate having a conductive area, a first pattern formed on the substrate and having a contact hole through which the conductive area is exposed, and a contact plug in the contact hole. The contact plug includes first and second silicon layers. The first silicon layer, formed from a first compound including at least two silicon atoms, is formed in the contact hole to contact a top surface of the conductive area and a side wall of the first pattern. The second silicon layer, formed from a second compound including a number of silicon atoms less than the number of the silicon atoms of the first compound, is formed on the first silicon layer and fills a remaining space of the contact hole, the second silicon layer being spaced apart from the first pattern at an entrance of the contact hole.

Abstract translation: 半导体器件包括具有导电区域的基板，形成在基板上的第一图案，具有导电区域露出的接触孔和接触孔中的接触插塞。 接触插塞包括第一和第二硅层。 在包括至少两个硅原子的第一化合物形成的第一硅层形成在接触孔中以接触导电区域的顶表面和第一图案的侧壁。 在第一硅层上形成由第二化合物构成的第二硅层，该第二化合物包含少于第一化合物的硅原子数的硅原子数，并填充接触孔的剩余空间，第二硅层 在接触孔的入口处与第一图案间隔开。

公开(公告)号：US20140167288A1

公开(公告)日：2014-06-19

申请号：US14186025

申请日：2014-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taek-soo Jeon ,  Bong-hyun Kim ,  Won-seok Yoo ,  Jae-hong Seo ,  Ho-kyun An ,  Dae-hyun Kim

IPC: H01L23/522

CPC classification number: H01L23/5226 ,  H01L21/28525 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L27/10823 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate having a conductive area, a first pattern formed on the substrate and having a contact hole through which the conductive area is exposed, and a contact plug in the contact hole. The contact plug includes first and second silicon layers. The first silicon layer, formed from a first compound including at least two silicon atoms, is formed in the contact hole to contact a top surface of the conductive area and a side wall of the first pattern. The second silicon layer, formed from a second compound including a number of silicon atoms less than the number of the silicon atoms of the first compound, is formed on the first silicon layer and fills a remaining space of the contact hole, the second silicon layer being spaced apart from the first pattern at an entrance of the contact hole.

Abstract translation: 半导体器件包括具有导电区域的基板，形成在基板上的第一图案，具有导电区域露出的接触孔和接触孔中的接触插塞。 接触插塞包括第一和第二硅层。 在包括至少两个硅原子的第一化合物形成的第一硅层形成在接触孔中以接触导电区域的顶表面和第一图案的侧壁。 在第一硅层上形成由第二化合物构成的第二硅层，该第二化合物包含少于第一化合物的硅原子数的硅原子数，并填充接触孔的剩余空间，第二硅层 在接触孔的入口处与第一图案间隔开。