公开(公告)号：US20130221493A1

公开(公告)日：2013-08-29

申请号：US13765696

申请日：2013-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-yeon Kim ,  Tae-hong Min ,  Yeong-kwon Ko ,  Tae-je Cho

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/3135 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/15311

Abstract: Semiconductor packages are disclosed. A semiconductor package includes: a first chip that includes a chip region and scribe regions at edges of the chip region, wherein the chip region comprises integrated circuit units and main through substrate vias electrically connected to the integrated circuit units; and a second chip that is bonded onto the first chip. The semiconductor package includes dummy conductive connectors including at least dummy wiring lines, the dummy conductive connectors electrically connected to the main through substrate vias at one end, and not capable of forming an electrical connection at the other end.

Abstract translation: 公开了半导体封装。 半导体封装包括：第一芯片，其在芯片区域的边缘处包括芯片区域和划线区域，其中芯片区域包括电连接到集成电路单元的集成电路单元和主通孔衬底通孔; 以及接合到第一芯片上的第二芯片。 半导体封装包括至少包括虚拟布线的虚拟导电连接器，虚拟导电连接器在一端电连接到主通孔衬底通孔，而不能在另一端形成电连接。

公开(公告)号：US08816407B2

公开(公告)日：2014-08-26

申请号：US13765696

申请日：2013-02-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-yeon Kim ,  Tae-hong Min ,  Yeong-kwon Ko ,  Tae-je Cho

IPC: H01L23/48 ,  H01L23/31

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/3135 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/15311

Abstract: Semiconductor packages are disclosed. A semiconductor package includes: a first chip that includes a chip region and scribe regions at edges of the chip region, wherein the chip region comprises integrated circuit units and main through substrate vias electrically connected to the integrated circuit units; and a second chip that is bonded onto the first chip. The semiconductor package includes dummy conductive connectors including at least dummy wiring lines, the dummy conductive connectors electrically connected to the main through substrate vias at one end, and not capable of forming an electrical connection at the other end.

Abstract translation: 公开了半导体封装。 半导体封装包括：第一芯片，其在芯片区域的边缘处包括芯片区域和划线区域，其中芯片区域包括电连接到集成电路单元的集成电路单元和主通孔衬底通孔; 以及接合到第一芯片上的第二芯片。 半导体封装包括至少包括虚拟布线的虚拟导电连接器，虚拟导电连接器在一端电连接到主通孔衬底通孔，而不能在另一端形成电连接。