公开(公告)号：US11837645B2

公开(公告)日：2023-12-05

申请号：US18085871

申请日：2022-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoontae Hwang ,  Wandon Kim ,  Geunwoo Kim ,  Heonbok Lee ,  Taegon Kim ,  Hanki Lee

IPC: H01L29/45 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/08 ,  H01L23/532 ,  H01L23/485 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/775 ,  H01L29/423 ,  H01L29/786 ,  H01L21/285

CPC classification number: H01L29/45 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76859 ,  H01L21/76886 ,  H01L21/823431 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53266 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/456 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696

Abstract: A semiconductor device including a substrate; a fin active region on the substrate and extending in a first direction; a gate structure extending across the fin active region and extending in a second direction; a source/drain region in the fin active region on a side of the gate structure; an insulating structure covering the gate structure and the source/drain region; and contact structures penetrating through the insulating structure and respectively connected to the source/drain region and the gate structure, wherein one of the contact structures includes a seed layer on the gate structure or the source/drain regions and including lower and upper regions, the lower region having a first grain size and the upper region being amorphous or having a grain size different from the first grain size, and a contact plug on an upper region of the seed layer and having a second grain size.

公开(公告)号：US12230682B2

公开(公告)日：2025-02-18

申请号：US17672033

申请日：2022-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoontae Hwang ,  Geunwoo Kim ,  Wandon Kim ,  Hyunbae Lee

IPC: H01L29/417 ,  H01L23/522 ,  H01L29/45

Abstract: An integrated circuit (IC) device includes a conductive region including a first metal on a substrate. An insulating film is on the conductive region. A conductive plug including a second metal passes through the insulating film and extends in a vertical direction. A conductive barrier pattern is between the conductive region and the conductive plug. The conductive barrier pattern has a first surface in contact with the conductive region and a second surface in contact with the conductive plug. A bottom surface and a lower sidewall of the conductive plug are in contact with the conductive barrier pattern, and an upper sidewall of the conductive plug is in contact with the insulating film. The conductive barrier pattern includes a vertical barrier portion between the insulating film and the conductive plug, and the vertical barrier portion has a width tapering along a first direction away from the conductive region.

公开(公告)号：US11538916B2

公开(公告)日：2022-12-27

申请号：US17231126

申请日：2021-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoontae Hwang ,  Wandon Kim ,  Geunwoo Kim ,  Heonbok Lee ,  Taegon Kim ,  Hanki Lee

IPC: H01L29/45 ,  H01L29/78 ,  H01L29/417 ,  H01L23/532 ,  H01L23/485 ,  H01L23/522 ,  H01L29/66 ,  H01L21/285 ,  H01L29/08

Abstract: A semiconductor device including a substrate; a fin active region on the substrate and extending in a first direction; a gate structure extending across the fin active region and extending in a second direction; a source/drain region in the fin active region on a side of the gate structure; an insulating structure covering the gate structure and the source/drain region; and contact structures penetrating through the insulating structure and respectively connected to the source/drain region and the gate structure, wherein one of the contact structures includes a seed layer on the gate structure or the source/drain regions and including lower and upper regions, the lower region having a first grain size and the upper region being amorphous or having a grain size different from the first grain size, and a contact plug on an upper region of the seed layer and having a second grain size.

公开(公告)号：US11631769B2

公开(公告)日：2023-04-18

申请号：US17321960

申请日：2021-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geunwoo Kim ,  Wandon Kim ,  Heonbok Lee ,  Yoontae Hwang

IPC: H01L29/78 ,  H01L29/417

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction; a gate structure extending across the fin-type active region in a second direction, different from the first direction; a source/drain region in the fin-type active region on one side of the gate structure; and first and second contact structures connected to the source/drain region and the gate structure, respectively, wherein at least one of the first and second contact structures includes a seeding layer on at least one of the gate structure and the source/drain region and including a first crystalline metal, and a contact plug on the seeding layer and including a second crystalline metal different from the first crystalline metal, and the second crystalline metal is substantially lattice-matched to the first crystalline metal at an interface between the seeding layer and the contact plug.