公开(公告)号：US20230247823A1

公开(公告)日：2023-08-03

申请号：US18056085

申请日：2022-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongkeun CHO ,  Jae Seong Park ,  Youngseok Kim ,  Young Sin Kim ,  Daeyoung Moon ,  Keum Joo Lee ,  Sung-Wook Jung ,  Sungduk Hong ,  Suhwan Hwang

IPC: H01L29/94 ,  G11C5/06

CPC classification number: H01L27/10814 ,  G11C5/063 ,  H01L27/10897

Abstract: A semiconductor memory device includes a substrate including a cell area and a peripheral area defined by a periphery of the cell area, the cell area including a dummy cell area and a normal cell area, and an active area defined by a cell element isolation film. The device includes a cell area separation film defining the cell area in the substrate, the dummy cell area defining a boundary with the cell area separation film between the normal cell area and the cell area separation film. The device includes a normal bit-line on the normal cell area and extending in a first direction, a dummy bit-line group on the dummy cell area, the dummy bit-line group including a plurality of dummy bit-lines extending in the first direction, and a plurality of storage contacts connected to the active area and located along a second direction perpendicular to the first direction.

公开(公告)号：US20220271044A1

公开(公告)日：2022-08-25

申请号：US17515888

申请日：2021-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Hyun Kim ,  Young Sin Kim ,  Dong Sik Park ,  Jong Min Lee ,  Joon Yong Choe

IPC: H01L27/108 ,  H01L29/66 ,  H01L21/768

Abstract: A semiconductor device comprises a substrate comprising a cell region; a cell region isolation film in the substrate and extending along an outer edge of the cell region; a bit-line structure on the substrate and in the cell region, wherein the bit-line structure has a distal end positioned on the cell region isolation film; a cell spacer on a vertical side surface of the distal end of the bit-line structure; an etching stopper film extending along a side surface of the cell spacer and a top face of the cell region isolation film; and an interlayer insulating film on the etching stopper film, and on the side surface of the cell spacer, wherein the interlayer insulating film includes silicon nitride.