IMAGE SENSOR, PIXEL, AND METHOD OF OPERATING THE PIXEL

    公开(公告)号:US20220217291A1

    公开(公告)日:2022-07-07

    申请号:US17561050

    申请日:2021-12-23

    Abstract: An image sensor includes a pixel array, in which a plurality of pixels are arranged, and a row driver for controlling the plurality of pixels. Each of the plurality of pixels includes a first photodiode, a second photodiode having a larger light-receiving area than the first photodiode, a first floating diffusion node in which charges generated by the first photodiode are stored, a first capacitor connected to the first floating diffusion node, and a capacitor control transistor having one end connected in series to the first capacitor. For each of the plurality of pixels, the row driver adjusts capacitance of the first floating diffusion node by using the capacitor control transistor for each of a plurality of preset operation modes during a readout period of the first photodiode.

    Image sensor
    6.
    发明授权

    公开(公告)号:US12028634B2

    公开(公告)日:2024-07-02

    申请号:US17570746

    申请日:2022-01-07

    CPC classification number: H04N25/75 H04N25/46 H04N25/705

    Abstract: An image sensor includes a first layer including a pixel array region having a plurality of pixels arranged in a plurality of row lines and a plurality of column lines; and a second layer including a row driver selecting at least a portion of the plurality of row lines, generating pixel control signals driving selected row lines, and outputting the pixel control signals to control signal lines, wherein the selected row lines share the control signal lines, at a branch point of the first layer, the selected row lines receive the pixel control signals from the control signal lines in common, and the pixel control signals simultaneously drive the selected row lines.

    Pixel and image sensor including the same

    公开(公告)号:US11743610B2

    公开(公告)日:2023-08-29

    申请号:US17833397

    申请日:2022-06-06

    CPC classification number: H04N25/59 H01L27/14612 H04N25/766 H01L27/14643

    Abstract: A unit pixel circuit includes a first photodiode, a second photodiode different from the first photodiode, a first floating diffusion node in which charges generated in the first photodiode are accumulated, a second floating diffusion node in which charges generated in the second photodiode are accumulated, a capacitor connected to the first floating diffusion node and a first voltage node, and accumulating overflowed charges of the first photodiode, a first switch transistor connecting the first floating diffusion node to a third floating diffusion node, a reset transistor connecting the third floating diffusion node to a second voltage node, a gain control transistor connecting the second floating diffusion node to the third floating diffusion node, and a second switch transistor connected to the first voltage node and the second voltage node.

    Image sensor having reduced parasitic capacitance

    公开(公告)号:US11606523B2

    公开(公告)日:2023-03-14

    申请号:US16890422

    申请日:2020-06-02

    Abstract: An image sensor, including a pixel array including a plurality of pixels connected to row lines extending in a first direction and column lines extending in a second direction intersecting the first direction; a ramp voltage generator configured to output a ramp voltage; a sampling circuit including a plurality of comparators, each comparator of the plurality of comparators having a first input terminal connected to a column of the column lines and a second input terminal configured to receive the ramp voltage; and an analog-to-digital converter configured to convert an output of the plurality of comparators to a digital signal, wherein the plurality of comparators include a first comparator connected to a first column line, and a second comparator connected to a second column line adjacent to the first column line in the first direction, wherein each of the first comparator and the second comparator includes a first transistor and a second transistor disposed sequentially in the second direction, and wherein a gap between the first transistor of the first comparator and the second transistor of the first comparator is different from a gap between the first transistor of the second comparator and the second transistor of the second comparator.

    Display screen or portion thereof with transitional graphical user interface

    公开(公告)号:USD1038984S1

    公开(公告)日:2024-08-13

    申请号:US29828385

    申请日:2022-02-25

    Abstract: FIG. 1 is the first image in a sequence for a display screen or portion thereof with transitional graphical user interface showing our new design; and,
    FIG. 2 is a front view of the second image thereof.
    The outermost broken lines in the figures depict a display screen or portion thereof and form no part of the claimed design.
    The remaining broken lines in the figures depict portions of the graphical user interface which form no part of the claimed design.
    The appearance of the graphical user interface sequentially transitions between the images shown in FIGS. 1 and 2. The process or period in which one image transitions to another forms no part of the claimed design.
    The grayscale tones shown in the figures represent a contrast in appearance.

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