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公开(公告)号:US10241704B2
公开(公告)日:2019-03-26
申请号:US15664536
申请日:2017-07-31
Applicant: SanDisk Technologies LLC
Inventor: Daniel Tuers , Abhijeet Manohar , Jonathan Hsu
IPC: G06F12/00 , G06F3/06 , G06F12/14 , G06F11/10 , G11C29/00 , G11C16/34 , G11C29/42 , G11C29/44 , G11C29/52 , G11C16/10 , G11C29/04
Abstract: A controller of a non-volatile memory system may be configured to identify bits of data to be stored in memory elements of non-volatile memory that are identified as unreliable. The controller may be configured to bias at least some of these bits to a predetermined logic value at which the bits are likely to be read from the unreliable memory elements. The controller may do so using a biasing key that the controller generates based on identification of the bits. Subsequently, when the data is read, the controller may assign log likelihood ratio values for the bits to correspond to a percent likelihood of the bits being biased to the predetermined logic value. The bits may also be unbiased using the biasing key.
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公开(公告)号:US20170329549A1
公开(公告)日:2017-11-16
申请号:US15664536
申请日:2017-07-31
Applicant: SanDisk Technologies LLC
Inventor: Daniel Tuers , Abhijeet Manohar , Jonathan Hsu
IPC: G06F3/06 , G06F11/10 , G11C29/00 , G11C29/52 , G11C29/44 , G11C29/42 , G06F12/14 , G11C16/34 , G11C29/04 , G11C16/10
CPC classification number: G06F3/0629 , G06F3/0619 , G06F3/0623 , G06F3/0679 , G06F11/1004 , G06F11/1012 , G06F12/1408 , G06F2212/402 , G11C16/10 , G11C16/3418 , G11C29/42 , G11C29/44 , G11C29/52 , G11C29/70 , G11C29/82 , G11C2029/0409
Abstract: A controller of a non-volatile memory system may be configured to identify bits of data to be stored in memory elements of non-volatile memory that are identified as unreliable. The controller may be configured to bias at least some of these bits to a predetermined logic value at which the bits are likely to be read from the unreliable memory elements. The controller may do so using a biasing key that the controller generates based on identification of the bits. Subsequently, when the data is read, the controller may assign log likelihood ratio values for the bits to correspond to a percent likelihood of the bits being biased to the predetermined logic value. The bits may also be unbiased using the biasing key.
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