公开(公告)号：US06917394B2

公开(公告)日：2005-07-12

申请号：US10228329

申请日：2002-08-27

申请人： Sang-Moo Song ,  Dong-Yeung Kwak ,  Se-Il Sohn

发明人： Sang-Moo Song ,  Dong-Yeung Kwak ,  Se-Il Sohn

IPC分类号： G02F1/1333 ,  G02F1/1362 ,  G02F1/1136 ,  G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/136227

摘要： An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

摘要翻译： 本发明的阵列基板包括具有栅极存储结构的存储电容器。 本发明的一个实施例公开了在漏电极下方的衬底上具有金属岛图案的阵列衬底。 金属岛图案设置在漏极接触孔的下方，像素电极通过该接触孔与漏电极接触。 由于金属岛图案具有与栅极线相同的厚度，所以钝化层在漏极区域和存储区域中都可以具有相同的高度。 在漏极和存储区域中的钝化层具有相同的均匀厚度的情况下，过蚀刻被最小化。

公开(公告)号：US07041521B2

公开(公告)日：2006-05-09

申请号：US11003387

申请日：2004-12-06

申请人： Sang-Moo Song ,  Dong-Yeung Kwak ,  Se-Il Sohn

发明人： Sang-Moo Song ,  Dong-Yeung Kwak ,  Se-Il Sohn

IPC分类号： H01L21/00

CPC分类号： G02F1/136213 ,  G02F1/136227

摘要： An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

公开(公告)号：US06876428B2

公开(公告)日：2005-04-05

申请号：US10163431

申请日：2002-06-07

申请人： Dong-Yeung Kwak ,  Sang-Moo Song

发明人： Dong-Yeung Kwak ,  Sang-Moo Song

IPC分类号： G02F1/133 ,  G02F1/1362 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  G02F1/13

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L29/66765

摘要： A gray tone mask, which is patterned and used in a photolithographic manufacturing process wherein a plurality of thin films are deposited and patterned on a substrate, said mask having different gaps in the vertical and horizontal directions so that the quantity of light which passes the patterned mask and irradiated on the photosensitive material is controlled depending on the direction of light irradiated from an exposing apparatus; and a method of manufacturing a TFT of a LCD using just four masks.

摘要翻译： 灰度色调掩模，其被图案化并在光刻制造工艺中使用，其中在衬底上沉积并图案化多个薄膜，所述掩模在垂直和水平方向上具有不同的间隙，使得通过图案化的光的量 掩模并照射在感光材料上，根据从曝光装置照射的光的方向来控制; 以及仅使用四个掩模制造LCD的TFT的方法。

公开(公告)号：US07015984B2

公开(公告)日：2006-03-21

申请号：US10228059

申请日：2002-08-27

申请人： Sang-Moo Song ,  Dong-Yeung Kwak

发明人： Sang-Moo Song ,  Dong-Yeung Kwak

IPC分类号： G02F1/1343 ,  G02F1/136

CPC分类号： G02F1/136227 ,  G02F1/136213

摘要： An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. The storage capacitor includes a gate line as a first electrode and a capacitor electrode as a second electrode. The capacitor electrode particularly has an extension that protruding from the capacitor electrode into a pixel region. Thus, when connecting a pixel electrode to the storage capacitor, the pixel electrode contacts the extension of the capacitor electrode. Since a storage contact hole through which the pixel electrode contacts the extension, a short between the pixel electrode and the gate line in the storage capacitor is prevented.

公开(公告)号：US06627470B2

公开(公告)日：2003-09-30

申请号：US09779438

申请日：2001-02-09

申请人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

发明人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78669

摘要： A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase. a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.

摘要翻译： TFT阵列基板具有PAI图案，并且PAI图案具有纯非晶硅层的过蚀刻部分。 该过蚀刻部分防止像素电极和纯非晶硅层（即有源层）之间的短路。 过蚀刻部分还使孔径比增加。 在所述衬底上的栅极线; 所述衬底上的数据线垂直于所述栅极线; 覆盖数据线的钝化层，钝化层分为残留钝化层和蚀刻钝化层; 形成在数据线之下且与数据线大小对应的掺杂非晶硅层; 形成在掺杂非晶硅层下面并且在周边部分中具有过蚀刻部分的纯非晶硅层，其中过蚀刻部分从残余钝化层的边缘向内侧被过度蚀刻; 在纯非晶硅层下面的绝缘体层; 形成在栅极线和数据线的交叉点附近的TFT; 以及与数据线重叠并与TFT接触的像素电极。

公开(公告)号：US07394515B2

公开(公告)日：2008-07-01

申请号：US11020174

申请日：2004-12-27

申请人： Dong-Yeung Kwak ,  Wang-Seob Kil

发明人： Dong-Yeung Kwak ,  Wang-Seob Kil

IPC分类号： G02F1/1345

CPC分类号： G02F1/13452 ,  G02F1/1345 ,  G02F2201/121

摘要： A liquid crystal display panel includes first and second substrates attached to each other by a seal pattern, the seal pattern being outside of a display region, a liquid crystal layer between the first and second substrates in the display region, a silver dot outside the seal pattern for electrically connecting the first substrate to the second substrate, and a first line-on-glass line and a second line-on-glass line on the first substrate outside the display region, the first line-on-glass line is completely in a pad region outside of the silver dot.

摘要翻译： 液晶显示面板包括通过密封图案彼此附接的第一和第二基板，密封图案在显示区域外部，显示区域中的第一和第二基板之间的液晶层，密封件外部的银点 用于将第一基板电连接到第二基板的图案，以及在显示区域的外部的第一基板上的第一玻璃线阵列和第二线对玻璃线，第一线阵列线完全在 在银点外面的垫区域。

公开(公告)号：US06760092B2

公开(公告)日：2004-07-06

申请号：US10652311

申请日：2003-09-02

申请人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

发明人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

IPC分类号： G02F11333

CPC分类号： G02F1/136286 ,  G02F1/133345 ,  G02F1/136204 ,  G02F2201/50

摘要： An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.

摘要翻译： 通过以下步骤制造用于液晶显示装置的阵列基板：在基板上形成第一金属层，图案化第一金属层以形成栅极线，栅电极，栅极焊盘，第一短路棒， 以及第二短路棒，形成栅绝缘层，纯非晶硅层，掺杂非晶硅层和第二金属层以覆盖图案化的第一金属层，图案化第二金属层和掺杂的非晶硅层以形成第一 第二和第三通孔以及第一和第二凹槽以暴露纯非晶硅层的一部分，第一和第二凹槽产生第二金属层的隔离部分，形成钝化层以覆盖图案化的第二金属层， 形成源电极，漏电极，数据线，数据焊盘，绝缘段以及第一，第二和第三接触孔，并形成像素电极，第一连接器和第二连接器 透明导电材料。

公开(公告)号：US06642972B2

公开(公告)日：2003-11-04

申请号：US09892785

申请日：2001-06-28

申请人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

发明人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

IPC分类号： G02F11333

CPC分类号： G02F1/136286 ,  G02F1/133345 ,  G02F1/136204 ,  G02F2201/50

摘要： An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.

摘要翻译： 通过以下步骤制造用于液晶显示装置的阵列基板：在基板上形成第一金属层，图案化第一金属层以形成栅极线，栅电极，栅极焊盘，第一短路棒， 以及第二短路棒，形成栅绝缘层，纯非晶硅层，掺杂非晶硅层和第二金属层以覆盖图案化的第一金属层，图案化第二金属层和掺杂的非晶硅层以形成第一 第二和第三通孔以及第一和第二凹槽以暴露纯非晶硅层的一部分，第一和第二凹槽产生第二金属层的隔离部分，形成钝化层以覆盖图案化的第二金属层， 形成源电极，漏电极，数据线，数据焊盘，绝缘段和第一，第二和第三接触孔，并形成像素电极，第一连接器和第二连接器 透明导电材料。

公开(公告)号：US06906760B2

公开(公告)日：2005-06-14

申请号：US09917861

申请日：2001-07-31

申请人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

发明人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hu-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Duk-Jin Park ,  Woo-Chae Lee

IPC分类号： G02F1/1333 ,  G02F1/1362 ,  G02F1/136

CPC分类号： G02F1/136286 ,  G02F2001/136263

摘要： A liquid crystal display device includes a substrate, a thin film transistor disposed on the substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode, a gate line arranged in a first direction on the substrate, the gate line connected with the gate electrode of the thin film transistor, a gate insulation layer disposed on the substrate and covering the gate line and the gate electrode of the thin film transistor, an intrinsic semiconductor layer disposed on the gate insulation layer, an extrinsic semiconductor layer disposed on the intrinsic semiconductor layer, a data line arranged in a second direction substantially perpendicular to the first direction disposed on the extrinsic semiconductor layer, the data line connected to the source electrode of the thin film transistor, first and second dummy metal layers formed over the gate line and arranged on opposite sides of the data line, a passivation layer covering the data line, the source electrode, the drain electrode and the first and second dummy metal layers, and a pixel electrode located at a pixel region defined by an intersection of the gate line and the data line, the pixel electrode contacting the drain electrode of the thin film transistor.

摘要翻译： 液晶显示装置包括基板，设置在基板上的薄膜晶体管，薄膜晶体管，其包括栅电极，源电极和漏电极，在基板上沿第一方向排列的栅极线，栅极线 与所述薄膜晶体管的栅电极连接，栅极绝缘层，设置在所述基板上并覆盖所述薄膜晶体管的栅极线和栅极，设置在所述栅极绝缘层上的本征半导体层，设置在所述栅极绝缘层上的外部半导体层 在本征半导体层上，沿与第二方向大致垂直的第二方向布置在非本征半导体层上的数据线，与薄膜晶体管的源极连接的数据线，形成在该半导体层上的第一和第二虚设金属层 栅极线并布置在数据线的相对侧，覆盖数据线的钝化层，源极 电极，漏电极和第一和第二虚拟金属层，以及位于由栅极线和数据线的交点限定的像素区域的像素电极，该像素电极与薄膜晶体管的漏电极接触。

公开(公告)号：US06690433B2

公开(公告)日：2004-02-10

申请号：US09923326

申请日：2001-08-08

申请人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hoo-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Dug-Jin Park ,  Woo-Chae Lee

发明人： Soon-Sung Yoo ,  Dong-Yeung Kwak ,  Hoo-Sung Kim ,  Yu-Ho Jung ,  Yong-Wan Kim ,  Dug-Jin Park ,  Woo-Chae Lee

IPC分类号： G02F11333

CPC分类号： G02F1/136204

摘要： An electrostatic damage preventing apparatus for a thin film transistor array of a liquid crystal display includes a horizontal ground voltage line disposed at a first perimeter portion of the thin film transistor array, a vertical ground voltage line disposed at a second perimeter portion of the thin film transistor array, and a first electrostatic damage-preventing switching device group including parallel connection of at least two electrostatic damage-preventing switching devices to divide and divert an electrostatic voltage applied over the horizontal ground voltage line.

摘要翻译： 一种用于液晶显示器的薄膜晶体管阵列的静电破坏防止装置包括设置在薄膜晶体管阵列的第一周边部分处的水平地电压线，设置在薄膜的第二周边部分的垂直接地电压线 晶体管阵列以及包括至少两个静电损伤防止开关装置的并联连接的第一静电损伤防止开关装置组，以分割和转移施加在水平地电压线上的静电电压。