Method for manufacturing a multiple walled capacitor of a semiconductor
device
    1.
    发明授权
    Method for manufacturing a multiple walled capacitor of a semiconductor device 失效
    制造半导体器件的多层电容器的方法

    公开(公告)号:US5399518A

    公开(公告)日:1995-03-21

    申请号:US91369

    申请日:1993-07-15

    摘要: A method for manufacturing a double-cylindrical storage electrode of a capacitor of a semiconductor memory device, utilizes an outer etching mask for forming an outer cylinder and an inner etching mask for forming an inner cylinder. After forming a conductive structure on a semiconductor substrate, an outer etching mask for forming an outer cylinder and an inner etching mask for forming an inner cylinder are formed on the conductive structure. Then, the conductive structure is anisotropically etched using the outer and inner etching masks, thereby forming a double-cylindrical first electrode. Since a double-cylindrical storage electrode can be obtained from a single conductive layer, the influence of native oxidation circumvented. In addition, the double-cylindrical storage electrode of the capacitor according to the present invention decreases the risk of structural fragmenting because the electrode is obtained from one material layer, instead of a combination of layers as is conventionally-known. Also, the storage electrode of the present invention has no sharp edges, so that leakage current can be minimized or avoided.

    摘要翻译: 一种用于制造半导体存储器件的电容器的双圆柱形存储电极的方法,利用用于形成外圆筒的外蚀刻掩模和用于形成内筒的内蚀刻掩模。 在半导体衬底上形成导电结构之后,在导电结构上形成用于形成外筒的外蚀刻掩模和用于形成内筒的内蚀刻掩模。 然后,使用外蚀刻掩模和内蚀刻掩模对导电结构进行各向异性蚀刻,从而形成双圆柱形第一电极。 由于可以从单个导电层获得双圆柱形存储电极,因此避免了天然氧化的影响。 此外,根据本发明的电容器的双圆柱形存储电极降低了结构碎裂的风险,因为电极是从一个材料层获得的,而不是如传统已知的层的组合。 此外,本发明的存储电极没有尖锐的边缘,使得可以最小化或避免泄漏电流。

    Method of making a dynamic random access memory device
    2.
    发明授权
    Method of making a dynamic random access memory device 失效
    制作动态随机存取存储器的方法

    公开(公告)号:US5389568A

    公开(公告)日:1995-02-14

    申请号:US142986

    申请日:1993-10-29

    申请人: Joo-young Yun

    发明人: Joo-young Yun

    CPC分类号: H01L28/91 H01L27/10817

    摘要: Disclosed is a dynamic random access memory device (DRAM) having an increased cell capacitance and simplified manufacturing method thereof. The storage electrode the capacitor of the DRAM is connected to a semiconductor substrate through an opening formed in an insulating layer, and has a structure having an outer peripheral wall portion with a laterally extending bottom on the insulating layer and an inner central pillar portion including a hole of a certain depth within the opening in the center of the outer peripheral wall portion. Thus, cell capacitance is greatly increased within a limited unit cell area, its reliability is enhanced, and the manufacturing process is distinctly simplified.

    摘要翻译: 公开了具有增加的单元电容的动态随机存取存储器件(DRAM)及其简化的制造方法。 DRAM的电容器的存储电极通过形成在绝缘层中的开口连接到半导体衬底,并且具有在绝缘层上具有侧向延伸的底部的外周壁部分和包括 在外周壁部的中心的开口内的一定深度的孔。 因此,在有限的单位电池区域内,电池电容大大增加,其可靠性得到提高,制造工艺明显简化。

    Dynamic random access memory device and a manufacturing method thereof
    3.
    发明授权
    Dynamic random access memory device and a manufacturing method thereof 失效
    动态随机存取存储器件及其制造方法

    公开(公告)号:US5453633A

    公开(公告)日:1995-09-26

    申请号:US282500

    申请日:1994-08-01

    申请人: Joo-young Yun

    发明人: Joo-young Yun

    CPC分类号: H01L28/91 H01L27/10817

    摘要: Disclosed is a dynamic random access memory device (DRAM) having an increased cell capacitance and simplified manufacturing method thereof. The storage electrode the capacitor of the DRAM is connected to a semiconductor substrate through an opening formed in an insulating layer, and has a structure having an outer peripheral wall portion with a laterally extending bottom on the insulating layer and an inner central pillar portion including a hole of a certain depth within the opening in the center of the outer peripheral wall portion. Thus, cell capacitance is greatly increased within a limited unit cell area, its reliability is enhanced, and the manufacturing process is distinctly simplified.

    摘要翻译: 公开了具有增加的单元电容的动态随机存取存储器件(DRAM)及其简化的制造方法。 DRAM的电容器的存储电极通过形成在绝缘层中的开口连接到半导体衬底,并且具有在绝缘层上具有侧向延伸的底部的外周壁部分和包括 在外周壁部的中心的开口内的一定深度的孔。 因此,在有限的单位电池区域内,电池电容大大增加,其可靠性得到提高,制造工艺明显简化。