Solid-state image sensing device
    1.
    发明授权
    Solid-state image sensing device 失效
    固态摄像装置

    公开(公告)号:US07589776B2

    公开(公告)日:2009-09-15

    申请号:US11594905

    申请日:2006-11-09

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    摘要翻译: 当由固态摄像装置输出的信号被钳位到预定的参考电位时,产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内,该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元,或者OPB单元的后续一个经由第二钳位脉冲钳位到钳位电平,以防止信号输出超过参考 电压在后期被提供给A / D转换器。

    Solid-state image sensing device
    2.
    发明申请

    公开(公告)号:US20060250512A1

    公开(公告)日:2006-11-09

    申请号:US11478685

    申请日:2006-07-03

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    Solid-state image sensing device
    3.
    发明授权
    Solid-state image sensing device 失效
    固态摄像装置

    公开(公告)号:US08159590B2

    公开(公告)日:2012-04-17

    申请号:US12457619

    申请日:2009-06-17

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    摘要翻译: 当由固态摄像装置输出的信号被钳位到预定的参考电位时,产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内,该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元,或者OPB单元的后续一个经由第二钳位脉冲钳位到钳位电平,以防止信号输出超过参考 电压在后期被提供给A / D转换器。

    Solid-state image sensing device
    4.
    发明申请

    公开(公告)号:US20090278972A1

    公开(公告)日:2009-11-12

    申请号:US12458660

    申请日:2009-07-20

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    Solid-State Image Sensing Device
    5.
    发明申请
    Solid-State Image Sensing Device 失效
    固态图像传感装置

    公开(公告)号:US20090256944A1

    公开(公告)日:2009-10-15

    申请号:US12457619

    申请日:2009-06-17

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    摘要翻译: 当由固态摄像装置输出的信号被钳位到预定的参考电位时,产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内,该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元,或者OPB单元的后续一个经由第二钳位脉冲钳位到钳位电平,以防止信号输出超过参考 电压在后期被提供给A / D转换器。

    Solid-state image sensing device
    6.
    发明授权

    公开(公告)号:US07573521B2

    公开(公告)日:2009-08-11

    申请号:US11478685

    申请日:2006-07-03

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    CCD imager with overflow drain
    7.
    发明授权
    CCD imager with overflow drain 失效
    CCD成像器带溢流排水

    公开(公告)号:US5455443A

    公开(公告)日:1995-10-03

    申请号:US226044

    申请日:1994-04-11

    CPC分类号: H01L27/14887

    摘要: A CCD solid state imaging device has an overflow mechanism to discharge excess electric charges at the sensor section. An overflow level can be stabilized without adjustment. The CCD solid state imaging device includes an overflow barrier region for determining an amount of electric charges handled by a sensor section, and an overflow drain region for discharging excess electric charges at the sensor section adjacent to the sensor section. An intermediate region having the same potential as that of the sensor portion is provided between the overflow barrier region and the overflow drain region. Also, a CCD solid state imaging device includes linear sensors provided in a plurality of lines and vertical transfer registers provided at end of the linear sensors in the charge transfer direction of the horizontal transfer registers. When signal charges are overflowed in a part of the horizontal transfer register, signals of all pixels can be avoided from being destroyed. In a CCD solid state imaging device having linear sensors arranged in a plurality of lines, and vertical transfer registers provided at ends of the linear sensors in the charge transfer direction of the horizontal transfer registers, there is formed a limit region for limiting electric charges to a predetermined amount before electric charges are transferred from the horizontal transfer register to the vertical transfer register.

    摘要翻译: CCD固态成像装置具有用于在传感器部分排出过量电荷的溢出机构。 溢出水平可以稳定而无需调整。 CCD固态成像装置包括用于确定由传感器部分处理的电荷量的溢出屏障区域和用于在与传感器部分相邻的传感器部分处排出多余电荷的溢出漏极区域。 在溢出阻挡区域和溢出漏极区域之间设置具有与传感器部分相同的电位的中间区域。 此外,CCD固态成像装置包括设置在多条线中的线性传感器和在水平传送寄存器的电荷传送方向上设置在线性传感器的端部处的垂直传送寄存器。 当信号电荷在水平传送寄存器的一部分中溢出时,可以避免所有像素的信号被破坏。 在具有布置在多条线中的线性传感器的CCD固态成像装置中,以及设置在水平传送寄存器的电荷传送方向上的线性传感器的端部处的垂直传送寄存器,形成用于限制电荷的极限区域 电荷从水平传送寄存器传送到垂直传送寄存器之前的预定量。

    Solid-state image sensing device
    8.
    发明申请
    Solid-state image sensing device 失效
    固态摄像装置

    公开(公告)号:US20070052828A1

    公开(公告)日:2007-03-08

    申请号:US11594905

    申请日:2006-11-09

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    摘要翻译: 当由固态摄像装置输出的信号被钳位到预定的参考电位时,产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内,该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元,或者OPB单元的后续一个经由第二钳位脉冲钳位到钳位电平,以防止信号输出超过参考 电压在后期被提供给A / D转换器。

    Solid-state image sensing device
    9.
    发明授权

    公开(公告)号:US07071977B2

    公开(公告)日:2006-07-04

    申请号:US10247557

    申请日:2002-09-20

    IPC分类号: H04N3/14

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    Solid-state image sensing device
    10.
    发明授权
    Solid-state image sensing device 失效
    固态摄像装置

    公开(公告)号:US07893982B2

    公开(公告)日:2011-02-22

    申请号:US12458660

    申请日:2009-07-20

    IPC分类号: H04N5/335

    摘要: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

    摘要翻译: 当由固态摄像装置输出的信号被钳位到预定的参考电位时,产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内,该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元,或者OPB单元的后续一个经由第二钳位脉冲被钳位到钳位电平,以防止信号输出超过参考 电压在后期被提供给A / D转换器。