Abstract:
When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.
Abstract:
A timing generation circuit (15) is formed integrally on the same glass substrate (11) together with a display area section (12) similarly to an H driver (13U) and a V driver (14), and timing pulses to be used by the H driver (13U) and the V driver (14) are produced based on timing data produced by a shift register (31U) of the H driver (13U) and a shift register (14A) of the V driver (14). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated.
Abstract:
An adaptive peak value detector, wherein the peak value for a peak hold section is detected, the peak hold section being selected by a peak hold control circuit. A solid-state imaging sensor generates pixel signals representative of an image and the peak value of portions of the pixel signals is detected. The exposure time of the sensor is adjusted as a function of the detected peak value and auto-focusing of the image for the camera is carried out on the basis of the image received during the adjusted exposure time.
Abstract:
A switching circuit comprising a means for holding a signal or a DC component thereof, and a switching transistor for driving the holding means, wherein another means is included for shaping the trailing edge to be more obtuse in the fall of a driving pulse applied to a gate of the switching transistor. There is also disclosed a charge transfer device comprising a charge transferrer for transferring a signal charge, a charge-voltage converter for converting the transferred signal charge into a proportional voltage, and a driver for supplying a reset pulse to the charge-voltage converter so as to reset the capacitance thereof to a predetermined potential, wherein another a means is incorporated in the driver for shaping the trailing edge to be more obtuse in the fall of the reset pulse. Since the trailing edge of the reset pulse at the time of turning off the reset is rendered more obtuse, it becomes possible to reduce the coupling portion of the output waveform where the potential of a floating diffusion or a floating gate is varied by the capacitive coupling which is derived from the parasitic capacitance between a reset drain and a reset gate.
Abstract:
A solid state image pickup device includes a sensor section having a plurality of light-receiving regions arranged such that each of the light-receiving regions converts an incident light into signal charges of an amount corresponding to the amount of light. A charge transfer register transfers the signal charges read out from each of the light-receiving regions of the sensor section. A charge discharging section discharges charges stored in each of the light-receiving regions of the sensor section under control of control means such that charges stored in each of the light-receiving regions are discharged to the charge discharging section within a predetermined period of time upon rising voltage of the power supply.
Abstract:
A charge transfer device including a charge input portion for inputting a reference charge, a charge transfer portion for receiving and transferring the reference charge, and a conversion portion converting the reference charge outputted from the charge transfer portion into a reference voltage. The reference charge input portion may be arranged to generate a reference charge. Alternatively, the reference charge may be externally generated. The charge transfer device may further include a signal charge input portion for inputting signal charges to the charge transfer portion. The signal charge input portion may be arranged to generate signal charges corresponding to incident light. Signal charges externally generated may be inputted to the signal charge input portion. The charge transfer device enables a charge-output voltage characteristic to be accurately detected at all times without any problem. It is also possible to accurately control the charge-output voltage characteristic.
Abstract:
A charge transfer device formed on a semiconductor substrate comprising: a charge transfer section formed on the semiconductor substrate for transferring charges, a floating gate having a floating gate diffusion layer formed on the semiconductor substrate for accumulating the charges transferred from the charge transfer section, an output gate section formed between the charge transfer section and the floating gate on the semiconductor substrate, and a charge detecting circuit electrically connected to the floating gate for outputting a voltage corresponding to the amount of the charges accumulated in the floating gate diffusion layer, the output gate section having a first output gate region adjacent to the charge transfer means and a second output gate region adjacent to the floating gate diffusion layer, the first output gate region having a first output gate electrode formed thereon with an insulating film therebetween, the second output gate region having a second output gate electrode formed thereon with an insulating film therebetween, a dc voltage being applied to the gate electrode, and an output voltage being applied to the second output gate electrode from the charging detecting circuit.
Abstract:
A CCD solid state imaging device has an overflow mechanism to discharge excess electric charges at the sensor section. An overflow level can be stabilized without adjustment. The CCD solid state imaging device includes an overflow barrier region for determining an amount of electric charges handled by a sensor section, and an overflow drain region for discharging excess electric charges at the sensor section adjacent to the sensor section. An intermediate region having the same potential as that of the sensor portion is provided between the overflow barrier region and the overflow drain region. Also, a CCD solid state imaging device includes linear sensors provided in a plurality of lines and vertical transfer registers provided at end of the linear sensors in the charge transfer direction of the horizontal transfer registers. When signal charges are overflowed in a part of the horizontal transfer register, signals of all pixels can be avoided from being destroyed. In a CCD solid state imaging device having linear sensors arranged in a plurality of lines, and vertical transfer registers provided at ends of the linear sensors in the charge transfer direction of the horizontal transfer registers, there is formed a limit region for limiting electric charges to a predetermined amount before electric charges are transferred from the horizontal transfer register to the vertical transfer register.
Abstract:
A charge-coupled device has a multi-layer structure insulating layer is formed beneath a transfer electrode, floating electrodes and an electrode adjacent the floating electrodes so that pin hole phenomenon in a charge transfer section of the charge coupled device can be successfully prevented. On the other hand, a sole-layer structure insulating layer is formed beneath a gate electrode of a peripheral component so that a threshold voltage of the gate electrode of the peripheral component can be successfully controlled at a desired value.
Abstract:
A charge transfer device, suitable for use, for example, in a solid state imager device, having a floating gate electrode in a charge detecting section, a protruding portion provided in at least one of the floating gate electrodes or a gate electrode arranged adjacent to the floating gate electrode, wherein the floating gate electrode and the gate electrode arranged adjacent to the floating gate electrode overlap each other at the protruding portion within an insulating layer, and whereby the parasitic capacitance associated with the floating gate electrode is decreased and the charge voltage converting gain is increased, rendering it possible to obtain an image signal with a good signal/noise ratio, when the charge transfer device is used for a solid state imager device.