SYSTEM ON CHIP POWER MANAGEMENT
    2.
    发明申请
    SYSTEM ON CHIP POWER MANAGEMENT 审中-公开
    芯片电源管理系统

    公开(公告)号:US20160224099A1

    公开(公告)日:2016-08-04

    申请号:US14611648

    申请日:2015-02-02

    Abstract: An implementation of a system disclosed herein provides an apparatus, comprising a system on chip, wherein the system on chip is configured to receive a sleep command from a host and in response to the sleep command, calculate a primary checksum of a block of data from a low latency memory such as a tightly coupled memory (TCM), copy the primary checksum and the block of data into a volatile storage media, preserve interface variables of the system on chip in the volatile storage media, operate the volatile storage media in a self-refresh mode, and shut down power to other components on the system on chip.

    Abstract translation: 本文公开的系统的实现提供了一种包括片上系统的装置,其中片上系统被配置为从主机接收睡眠命令,并且响应于睡眠命令,计算来自 诸如紧耦合存储器(TCM)的低延迟存储器将主校验和和数据块复制到易失性存储介质中,保留片上系统在易失性存储介质中的接口变量,在易失性存储介质中操作易失性存储介质 自刷新模式,并关闭芯片上系统的其他组件的电源。

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