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公开(公告)号：US09875154B2
公开(公告)日：2018-01-23
申请号：US14789168
申请日：2015-07-01
Applicant: Seiko Instruments Inc.
Inventor： Masanori Miyagi , Taro Yamasaki
CPC classification number: G06F11/1068 , G06F11/1048 , G11C29/36 , G11C29/42 , G11C29/52
Abstract: Provided is a non-volatile semiconductor storage device which can be downsized with a simple circuit without impairing the function of an error correcting section, and a method of testing the non-volatile semiconductor storage device. An error correction circuit is configured to perform error detection and correction of merely the same number of bits as data bits, and a circuit for performing error detection and correction of check bits is omitted to downsize the circuit. A multiplexer for, in a testing state, replacing a part of the data bits read out from a storage element array with the check bits, and inputting the check bits to the error correction circuit is provided. Thus, error detection and correction of the check bits are performed to enable shipment inspection concerning the check bits as well.
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公开(公告)号：US08730753B2
公开(公告)日：2014-05-20
申请号：US13777468
申请日：2013-02-26
Applicant: Seiko Instruments Inc.
Inventor： Taro Yamasaki
IPC: G11C5/14
Abstract: A nonvolatile semiconductor memory device, having a booster circuit capable of performing a boost operation with appropriate boost voltage arrival time without increasing the circuit size. The nonvolatile semiconductor memory device includes a timing generator circuit and a current load circuit which applies a current load to an output of a booster unit according to a signal from the timing generator circuit, thereby achieving an appropriate boost voltage arrival time by using the current load circuit in concert with the operation of erasing or writing on memory cells.
Abstract translation: 一种非易失性半导体存储器件，具有能够在不增加电路尺寸的情况下以适当的升压电压到达时间执行升压操作的升压电路。 非易失性半导体存储器件包括定时发生器电路和电流负载电路，其根据来自定时发生器电路的信号向升压器单元的输出施加电流负载，从而通过使用当前负载来实现适当的升压电压到达时间 与在存储器单元上擦除或写入的操作一致。
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