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公开(公告)号：US11610998B2
公开(公告)日：2023-03-21
申请号：US17257364
申请日：2019-06-26
发明人： Rai Sato , Masami Jintyou , Masayoshi Dobashi , Takashi Shiraishi
IPC分类号： H01L27/00 , H01L29/00 , H01L51/00 , G02F1/1362 , H01L29/786 , H01L27/12 , H01L29/66
摘要： A transistor in which shape defects are unlikely to occur is provided. A transistor with favorable electrical characteristics is provided. A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a transistor. The transistor includes a semiconductor layer, a first insulating layer, a metal oxide layer, a functional layer, and a conductive layer. The first insulating layer is positioned over the semiconductor layer. The metal oxide layer is positioned over the first insulating layer. The functional layer is positioned over the metal oxide layer. The conductive layer is positioned over the functional layer. The semiconductor layer, the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer have regions overlapping with each other. In the channel length direction of the transistor, end portions of the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer are positioned inward from an end portion of the semiconductor layer. An etching rate of the functional layer with an etchant containing one or more of phosphoric acid, acetic acid, nitric acid, hydrochloric acid, and sulfuric acid is lower than an etching rate of the conductive layer.
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公开(公告)号：US09997576B2
公开(公告)日：2018-06-12
申请号：US15456887
申请日：2017-03-13
发明人： Yasuhiro Jinbo , Kohei Yokoyama , Yuki Tamatsukuri , Naoto Goto , Masami Jintyou , Masayoshi Dobashi , Masataka Nakada , Akihiro Chida , Naoyuki Senda
CPC分类号： H01L27/3258 , H01L51/5253 , H01L2251/301 , H01L2251/5338
摘要： To provide a display device with a manufacturing yield and/or a display device with suppressed mixture of colors between adjacent pixels. The display device includes a first pixel electrode, a second pixel electrode, a first insulating layer, a second insulating layer, and an adhesive layer. The first insulating layer includes a first opening. The second insulating layer includes a second opening. The first opening and the second opening are provided between the first pixel electrode and the second pixel electrode. In a top view, a periphery of the second opening is positioned on an inner side than a periphery of the first opening. The adhesive layer has a region overlapping with the second insulating layer below the second insulating layer.
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公开(公告)号：US11069816B2
公开(公告)日：2021-07-20
申请号：US16635295
申请日：2018-08-22
IPC分类号： G02F1/1333 , G02F1/1368 , H01L29/786 , G02F1/1345 , G02F1/1343
摘要： A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a first conductive layer, and a second conductive layer. The second semiconductor layer is positioned over the first semiconductor layer, the second conductive layer is positioned on the second semiconductor layer, and the second insulating layer is provided so as to cover a top surface and a side surface of the second conductive layer. The second conductive layer and the second insulating layer include a first opening, and the third semiconductor layer is provided in contact with a top surface of the second insulating layer, a side surface of the first opening, and the second semiconductor layer. The first insulating layer is positioned between the first conductive layer and the third semiconductor layer, the third insulating layer is positioned between the first insulating layer and the first conductive layer, and the fourth insulating layer is provided so as to surround the first conductive layer.
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公开(公告)号：US10304919B2
公开(公告)日：2019-05-28
申请号：US15966640
申请日：2018-04-30
发明人： Yasuhiro Jinbo , Kohei Yokoyama , Yuki Tamatsukuri , Naoto Goto , Masami Jintyou , Masayoshi Dobashi , Masataka Nakada , Akihiro Chida , Naoyuki Senda
摘要： To provide a display device with a manufacturing yield and/or a display device with suppressed mixture of colors between adjacent pixels. The display device includes a first pixel electrode, a second pixel electrode, a first insulating layer, a second insulating layer, and an adhesive layer. The first insulating layer includes a first opening. The second insulating layer includes a second opening. The first opening and the second opening are provided between the first pixel electrode and the second pixel electrode. In a top view, a periphery of the second opening is positioned on an inner side than a periphery of the first opening. The adhesive layer has a region overlapping with the second insulating layer below the second insulating layer.
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公开(公告)号：US11894466B2
公开(公告)日：2024-02-06
申请号：US17279153
申请日：2019-09-27
发明人： Rai Sato , Masami Jintyou , Masayoshi Dobashi , Takashi Shiraishi , Satoru Saito , Yasutaka Nakazawa
IPC分类号： H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12 , H01L29/49
CPC分类号： H01L29/78621 , H01L29/42384 , H01L29/66969 , H01L27/1225 , H01L29/4908 , H01L29/7869 , H01L2029/42388
摘要： A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a metal oxide layer, and a conductive layer; the first insulating layer, the metal oxide layer, and the conductive layer are stacked in this order over the semiconductor layer; an end portion of the first insulating layer is located inward from an end portion of the semiconductor layer; an end portion of the metal oxide layer is located inward from the end portion of the first insulating layer; and an end portion of the conductive layer is located inward from the end portion of the metal oxide layer. The second insulating layer is preferably provided to cover the semiconductor layer, the first insulating layer, the metal oxide layer, and the conductive layer. It is preferable that the semiconductor layer include a first region, a pair of second regions, and a pair of third regions; the first region overlap with the first insulating layer and the metal oxide layer; the second regions between which the first region is sandwiched overlap with the first insulating layer and not overlap with the metal oxide layer; the third regions between which the first region and the pair of second regions are sandwiched not overlap with the first insulating layer; and the third regions be in contact with the second insulating layer.
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公开(公告)号：US11177373B2
公开(公告)日：2021-11-16
申请号：US16344177
申请日：2017-10-25
IPC分类号： H01L29/66 , H01L29/786 , H01L51/00 , H01L27/12 , H01L27/32
摘要： A semiconductor device is manufactured with high mass productivity at low cost. Yield in a manufacturing process of the semiconductor device is improved. An island-shaped metal oxide layer is formed over a substrate, a resin layer is formed over the metal oxide layer to cover an end portion of the metal oxide layer, and the metal oxide layer and the resin layer are separated by light irradiation. After forming the resin layer and before the light irradiation, an insulating layer is formed over the resin layer. For example, the resin layer is formed in an island shape and the insulating layer is formed to cover an end portion of the resin layer. In the case where an adhesive layer is formed over the resin layer, the adhesive layer is preferably formed to be located inward from the end portion of the metal oxide layer.
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