METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND THREE-DIMENSIONAL SEMICONDUCTOR DEVICE FABRICATED USING THE SAME
    2.
    发明申请
    METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND THREE-DIMENSIONAL SEMICONDUCTOR DEVICE FABRICATED USING THE SAME 有权
    制造三维半导体器件的方法和使用其制造的三维半导体器件

    公开(公告)号:US20140106569A1

    公开(公告)日:2014-04-17

    申请号:US13949600

    申请日:2013-07-24

    IPC分类号: H01L21/308

    摘要: According to example embodiments of inventive concepts, a method of fabricating a 3D semiconductor device may include: forming a stack structure including a plurality of horizontal layers sequentially stacked on a substrate including a cell array region and a contact region; forming a first mask pattern covering the cell array region and defining openings extending in one direction over the contact region; performing a first etching process with a first etch-depth using the first mask pattern as an etch mask on the stack structure; forming a second mask pattern covering the cell array region and exposing a part of the contact region; and performing a second etching process with a second etch-depth using the second mask pattern as an etch mask structure on the stack structure. The second etch-depth may be greater than the first etch-depth.

    摘要翻译: 根据发明构思的示例性实施例,制造3D半导体器件的方法可以包括:形成包括依次层叠在包括单元阵列区域和接触区域的基板上的多个水平层的堆叠结构; 形成覆盖所述单元阵列区域并限定在所述接触区域上沿一个方向延伸的开口的第一掩模图案; 使用所述第一掩模图案作为所述堆叠结构上的蚀刻掩模,利用第一蚀刻深度执行第一蚀刻工艺; 形成覆盖所述单元阵列区域并露出所述接触区域的一部分的第二掩模图案; 以及使用所述第二掩模图案作为所述堆叠结构上的蚀刻掩模结构,用第二蚀刻深度执行第二蚀刻工艺。 第二蚀刻深度可以大于第一蚀刻深度。