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公开(公告)号：US5317279A
公开(公告)日：1994-05-31
申请号：US999316
申请日：1992-12-31
申请人： Seyed R. Zarabadi , Mohammed Ismail
发明人： Seyed R. Zarabadi , Mohammed Ismail
CPC分类号： H03F1/3211 , H03F3/4569
摘要： A voltage to current converter includes three field effect transistors (FETs), the sources of which are electrically connected to define a common source node, and a feedback network. First and second voltage inputs are connected to the gates of the first and second FETs, respectively. First and second current outputs are connected to the drains of the first and second FETs, respectively. The feedback network is connected between the drain of the third FET and the common source node. The feedback network controls and extends linearity by varying the voltage between the common source node and ground in response to changes in the voltage inputs in order to maintain a constant current through the third FET. The floating common source node quickly adjusts and thereby keeps a linear relationship between the input voltages and the output currents. Thus, the feedback network can dynamically bias the converter by permitting the common source node to float with respect to ground.
摘要翻译： 电压 - 电流转换器包括三个场效应晶体管（FET），其源极电连接以定义公共源节点和反馈网络。 第一和第二电压输入分别连接到第一和第二FET的栅极。 第一和第二电流输出分别连接到第一和第二FET的漏极。 反馈网络连接在第三FET的漏极和公共源节点之间。 反馈网络通过响应于电压输入的变化改变公共源节点和地之间的电压来控制和扩展线性，以便保持通过第三FET的恒定电流。 浮动公共源节点快速调整，从而保持输入电压和输出电流之间的线性关系。 因此，反馈网络可以通过允许公共源节点相对于地面浮动来动态地偏置转换器。
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公开(公告)号：US5337021A
公开(公告)日：1994-08-09
申请号：US75941
申请日：1993-06-14
申请人： Seyed R. Zarabadi , Mohammed Ismail
发明人： Seyed R. Zarabadi , Mohammed Ismail
摘要： A circuit apparatus suitable for use as a basic building block of very small geometry integrated circuits (on the order of 1 micron and smaller) comprising (i) a current mirror circuit with a cascode output, comprising a first transistor and a second transistor connected in series, the first transistor coupled between a ground and the second transistor, and (ii) a single stage gain loop comprising a transresistance amplifier coupled between a control input of the second transistor and the series connection of the first and second transistors, wherein the circuit apparatus provides an output with high impedance output and with maximum swing capability.
摘要翻译： 一种适合用作非常小几何集成电路（大约1微米或更小）的基本构建块的电路装置，包括：（i）具有共源共栅输出的电流镜像电路，包括第一晶体管和连接在其中的第二晶体管 串联，耦合在地和第二晶体管之间的第一晶体管，以及（ii）单级增益环，包括耦合在第二晶体管的控制输入端和第一和第二晶体管的串联连接之间的跨阻放大器，其中电路 设备提供具有高阻抗输出和最大摆幅能力的输出。
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公开(公告)号：US07932772B1
公开(公告)日：2011-04-26
申请号：US12610659
申请日：2009-11-02
申请人： Seyed R. Zarabadi
发明人： Seyed R. Zarabadi
IPC分类号： G05F1/10
CPC分类号： H02M3/073
摘要： A band-gap reference voltage is developed by a phase-clocked band-gap circuit including a single PN junction through which first and second constant currents are alternately directed. A current proportional to absolute temperature is selectively added to one of the first and second constant currents to curvature-compensate the developed band-gap reference voltage. The band-gap circuit is calibrated at any desired temperature by interrupting the curvature compensation current and trimming the one constant current to bring the un-compensated band-gap reference voltage into correspondence with a nominal band-gap voltage functionally related to the calibration temperature and circuit component values.
摘要翻译： 带隙参考电压由包括第一和第二恒定电流交替指向的单个PN结的相位时钟带隙电路产生。 选择性地将与绝对温度成比例的电流加到第一和第二恒定电流之一中，以对所开发的带隙参考电压进行曲率补偿。 通过中断曲率补偿电流并修整一个恒定电流来使带隙电路在任何所需温度下校准，以使未补偿的带隙基准电压与功能上与校准温度有关的标称带隙电压对应，并且 电路元件值。
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公开(公告)号：US07908922B2
公开(公告)日：2011-03-22
申请号：US12011184
申请日：2008-01-24
申请人： Seyed R. Zarabadi , John C. Christenson , Dan W. Chilcott , Richard G. Forestal , Jack D. Johnson
发明人： Seyed R. Zarabadi , John C. Christenson , Dan W. Chilcott , Richard G. Forestal , Jack D. Johnson
IPC分类号： G01P9/04
CPC分类号： G01C19/5684
摘要： A motion sensor in the form of an angular rate sensor and a method of making a sensor are provided and includes a support substrate and a silicon sensing ring supported by the substrate and having a flexive resonance. Drive electrodes apply electrostatic force on the ring to cause the ring to resonate. Sensing electrodes sense a change in capacitance indicative of vibration modes of resonance of the ring so as to sense motion. A plurality of silicon support rings connect the substrate to the ring. The support rings are located at an angle to substantially match a modulus of elasticity of the silicon, such as about 22.5 degrees and 67.5 degrees, with respect to the crystalline orientation of the silicon.
摘要翻译： 提供角速率传感器形式的运动传感器和制造传感器的方法，并且包括支撑衬底和由衬底支撑并具有柔性共振的硅感测环。 驱动电极在环上施加静电力，使环产生共振。 感测电极感测指示环的谐振的振动模式的电容的变化，以便感测运动。 多个硅支撑环将基板连接到环上。 支撑环以与硅的结晶取向基本上匹配的弹性模量（例如约22.5度和67.5度）的角度定位。
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公开(公告)号：US20090072841A1
公开(公告)日：2009-03-19
申请号：US11999161
申请日：2007-12-04
申请人： Zinovy Tyves , Gary D. Bree , Brent T. Repp , Seyed R. Zarabadi
发明人： Zinovy Tyves , Gary D. Bree , Brent T. Repp , Seyed R. Zarabadi
IPC分类号： G01R27/26
CPC分类号： H03K17/955 , H03K2217/96015
摘要： An extruded capacitive sensor assembly includes multiple sense conductors of unequal length disposed in an upper section of a non-conductive jacket, and a ground conductor disposed in a lower section of the jacket adjacent a panel or carrier to which the strip is affixed. A sensor strip with three sense conductors is formed by extruding a non-conductive jacket having first and second sense conductors in the upper section of the jacket, and severing the first sense conductor to create three unequal length sense conductor segments. Electrical termination to the sense and ground conductors can be made at the point where the first sense conductor is severed, or at the end of the sensor strip. In cases where only two sense conductor segments are needed, the third sense conductor segment is removed or simply un-used.
摘要翻译： 挤出的电容式传感器组件包括设置在非导电护套的上部中的不等长度的多个感测导体，以及布置在护套的下部中的接地导体，邻近贴片所附着的面板或载体。 具有三个感测导体的传感器带通过在夹套的上部中挤出具有第一和第二感测导体的非导电套管而形成，并且切断第一感测导体以产生三个不等长度的感测导体段。 可以在第一感测导体断开的点处或传感器带的末端处对感测和接地导体的电终端进行。 在仅需要两个感测导体段的情况下，第三感测导体段被去除或者简单地不被使用。
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公开(公告)号：US4987387A
公开(公告)日：1991-01-22
申请号：US404793
申请日：1989-09-08
CPC分类号： H03L7/0891 , H03L7/093 , H03L7/18
摘要： A Phase Locked Loop (PLL) circuit includes a control signal generator, a digital phase detector, logic gates, a charge pump (charge/discharge circuit), a transmission gate, a loop filter, a lead-lag filter and a voltage controlled oscillator (VCO). Outputs of the digital phase detector are coupled through the logic gates to inputs of the charge pump. An output of the charge pump is coupled to the capacitor and to a first input/output of the transmission gate. A second input/output of the transmission gate is coupled to an input of the loop filter whose output is coupled to an input of the VCO whose output is coupled to a first input of the digital phase detector. A second input of the digital phase detector is coupled to a source of a reference frequency signal. The control signal generator generates non-overlapping complementary control signals with one of same connected to the logic gates and the other connected to the transmission gate. Accordingly, the electrical path from the digital phase detector to the charge pump through the logic gates is closed and the electrical path from the capacitor to the loop filter is open or vice versa. The loop filter includes an operational amplifier with AC feedback which is controlled by the same signal which controls the logic gates. The PLL circuit is typically formed on a single integrated circuit silicon chip using CMOS technology.
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公开(公告)号：US4975653A
公开(公告)日：1990-12-04
申请号：US419570
申请日：1989-08-29
CPC分类号： H03D3/00
摘要： An integrated circuit FM detector which compensates for variations in semiconductor manufacturing process and temperature employs a pair of serially connected switched capacitor-operational amplifier combinations. The first combination is a frequency to voltage converter which uses a switched capacitor input circuit which is clocked at the frequency of the input signal, an operational amplifier and a feedback resistor. The second combination is a compensation circuit which uses an input resistor, a feedback switched capacitor circuit and an operational amplifier. The feedback switched capacitor circuit is clocked at a fixed rate. Reversal of the roles of the resistor and the switched capacitor in the first and second combinations compensates for both temperature and manufacturing process variations. The electrical separation of the input and feedback switched capacitor circuits helps to insure against the generation of unwanted noise in the form of beat frequencies which could be generated if the switched capacitor circuits were used as the input and feedback circuits of a single operational amplifier.
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公开(公告)号：US08489357B2
公开(公告)日：2013-07-16
申请号：US12999131
申请日：2009-07-23
IPC分类号： G01K7/16
CPC分类号： G01K7/01 , G01K7/427 , G01K2217/00
摘要： An apparatus and method of determining the junction temperature (Tj) and drain-source current (Ids) of a standard FET within a multi-FET module includes a control IC managing one or more 3 terminal standard FETs within the same package, calculating Tj and Tds for one or more FETs in one or more packages, and protecting each FET against short circuit faults while allowing high current transients, such as inrush currents from a lamp load.
摘要翻译： 确定多FET模块内的标准FET的结温（Tj）和漏 - 源电流（Ids）的装置和方法包括管理同一封装内的一个或多个3个端子标准FET的控制IC，计算Tj和 Tds用于一个或多个封装中的一个或多个FET，并且保护每个FET免于短路故障，同时允许高电流瞬变，例如来自灯负载的浪涌电流。
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公开(公告)号：US20080246495A1
公开(公告)日：2008-10-09
申请号：US11784036
申请日：2007-04-05
IPC分类号： G01R27/26
CPC分类号： H03K17/955
摘要： A switched capacitance detection circuit is responsive to changes in the fringing capacitance of a capacitive proximity sensor having at least one capacitive sensor element. In cases where the sensor has a single sensor element, the switching frequency of the detection circuit is controlled to maintain measurement accuracy in the presence of sensor moisture while minimizing power consumption and electromagnetic radiation. In cases where the sensor has multiple sensor elements, the capacitance values for each sensor element are differenced, absolute-valued and summed to form an output in which common-mode effects due to sensor moisture, temperature and sensor aging are canceled out.
摘要翻译： 开关电容检测电路响应于具有至少一个电容式传感器元件的电容式接近传感器的边缘电容的变化。 在传感器具有单个传感器元件的情况下，检测电路的开关频率被控制以在传感器湿度的存在下保持测量精度，同时最小化功率消耗和电磁辐射。 在传感器具有多个传感器元件的情况下，每个传感器元件的电容值被差分，绝对值和相加，以形成其中由于传感器湿度，温度和传感器老化而导致的共模效应被抵消的输出。
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公开(公告)号：US07204162B2
公开(公告)日：2007-04-17
申请号：US10995779
申请日：2004-11-23
申请人： Jack D. Johnson , Seyed R. Zarabadi , Ian D. Jay
发明人： Jack D. Johnson , Seyed R. Zarabadi , Ian D. Jay
摘要： A strain gauge for sensing strain is provided and includes a support substrate, and first and second electrodes supported on the substrate. The first and second electrodes include first and second capacitive plates, respectively. The first capacitive plates are movable relative to the second capacitive plates responsive to strain. The strain gauge further has an input electrically coupled to one of the first and second electrodes for receiving an input signal, and an output electrically coupled to the other of the first and second electrodes for providing an output signal which varies as a function of the capacitive coupling and is indicative of sensed strain.
摘要翻译： 提供了用于感测应变的应变计，并且包括支撑衬底以及支撑在衬底上的第一和第二电极。 第一和第二电极分别包括第一和第二电容板。 响应于应变，第一电容板相对于第二电容板可移动。 应变仪还具有电耦合到第一和第二电极中的一个用于接收输入信号的输入端，以及电耦合到第一和第二电极中的另一个的输出端，用于提供作为电容器的函数而变化的输出信号 耦合并且表示感测到的应变。
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