公开(公告)号：US07335954B2

公开(公告)日：2008-02-26

申请号：US11110315

申请日：2005-04-20

申请人： Jack L. Glenn ,  Pedro E. Castillo-Borelly

发明人： Jack L. Glenn ,  Pedro E. Castillo-Borelly

IPC分类号： H01L23/62

CPC分类号： H01L29/87 ,  H01L27/0262 ,  H01L29/0626 ,  H01L29/8611

摘要： An electrostatic discharge (ESD) protection device includes a first-type substrate, a second-type well formed in the substrate and a first-type well formed in the substrate. The second-type well includes a second-type+ region formed between first and second first-type+ regions. The first-type well is formed in the substrate adjacent a first side of the second-type well. The first-type well includes first and second first-type regions with a first-type+ region and a second-type+ region formed between the first and second first-type regions. The second-type+ region of the first-type well is formed between the first-type+ region of the first-type well and the second-type well.

摘要翻译： 静电放电（ESD）保护装置包括第一型衬底，在衬底中形成的第二类阱和在衬底中形成的第一类阱。 第二类阱包括在第一和第二第一类型+区域之间形成的第二类型+区域。 第一类型的阱在与第二类型阱的第一侧相邻的衬底中形成。 第一类阱包括在第一和第二第一类型区域之间形成第一和第二第一类型的区域，其具有第一类型+区域和第二类型+区域。 第一型阱的第二型+区形成在第一型阱的第一型+区与第二型阱之间。

公开(公告)号：US07645627B2

公开(公告)日：2010-01-12

申请号：US12011063

申请日：2008-01-24

申请人： John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack L. Glenn ,  Seyed R. Zarabadi

发明人： John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack L. Glenn ,  Seyed R. Zarabadi

IPC分类号： H01L21/00

CPC分类号： B81C1/00246 ,  B81B3/001 ,  B81B2201/0242 ,  B81C2203/0735

摘要： A motion sensor in the form of an angular rate sensor and a method of making a sensor are provided and includes a support substrate and a silicon sensing ring supported by the substrate and having a flexive resonance. Drive electrodes apply electrostatic force on the ring to cause the ring to resonate. Sensing electrodes sense a change in capacitance indicative of vibration modes of resonance of the ring so as to sense motion. A plurality of silicon support rings connect the substrate to the ring. The support rings are located at an angle to substantially match a modulus of elasticity of the silicon, such as about 22.5 degrees and 67.5 degrees, with respect to the crystalline orientation of the silicon.

摘要翻译： 提供角速率传感器形式的运动传感器和制造传感器的方法，并且包括支撑衬底和由衬底支撑并具有柔性共振的硅感测环。 驱动电极在环上施加静电力，使环产生共振。 感测电极感测指示环的谐振的振动模式的电容的变化，以便感测运动。 多个硅支撑环将基板连接到环上。 支撑环以与硅的结晶取向基本上匹配的弹性模量（例如约22.5度和67.5度）的角度定位。

公开(公告)号：US20090191660A1

公开(公告)日：2009-07-30

申请号：US12011063

申请日：2008-01-24

申请人： John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack L. Glenn ,  Seyed R. Zarabadi

发明人： John C. Christenson ,  Dan W. Chilcott ,  Richard G. Forestal ,  Jack L. Glenn ,  Seyed R. Zarabadi

IPC分类号： H01L21/00

CPC分类号： B81C1/00246 ,  B81B3/001 ,  B81B2201/0242 ,  B81C2203/0735

摘要： A motion sensor in the form of an angular rate sensor and a method of making a sensor are provided and includes a support substrate and a silicon sensing ring supported by the substrate and having a flexive resonance. Drive electrodes apply electrostatic force on the ring to cause the ring to resonate. Sensing electrodes sense a change in capacitance indicative of vibration modes of resonance of the ring so as to sense motion. A plurality of silicon support rings connect the substrate to the ring. The support rings are located at an angle to substantially match a modulus of elasticity of the silicon, such as about 22.5 degrees and 67.5 degrees, with respect to the crystalline orientation of the silicon.

摘要翻译： 提供角速率传感器形式的运动传感器和制造传感器的方法，并且包括支撑衬底和由衬底支撑并具有柔性共振的硅感测环。 驱动电极在环上施加静电力，使环产生共振。 感测电极感测指示环的谐振的振动模式的电容的变化，以便感测运动。 多个硅支撑环将基板连接到环上。 支撑环以与硅的结晶取向基本上匹配的弹性模量（例如约22.5度和67.5度）的角度定位。

公开(公告)号：US20080099848A1

公开(公告)日：2008-05-01

申请号：US11586412

申请日：2006-10-25

申请人： Jack L. Glenn

发明人： Jack L. Glenn

IPC分类号： H01L23/62

CPC分类号： H01L27/0262 ,  H01L29/7436 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary designs. A dynamic region having doped regions is formed on a substrate, interconnects contacting the dynamic region. The dynamic region includes an Nwell region, a Pwell region and shallow diffusions, defining a PNP region, an NPN region and a voltage Breakdown region. In an aspect, the Nwell region includes a first N+ contact, a first P+ contact and an N+ doped enhancement, while the Pwell region includes a second N+ contact, a second P+ contact and a P+ doped enhancement. The N+ doped enhancement contacts the P+ doped enhancement forming the breakdown voltage region therebetween, in one case forming a buried breakdown voltage junction. Independent control is provided over breakdown voltage, NPN critical voltage, NPN critical current and PNP critical current, by varying doping levels, widths and positioning of various doping regions.

摘要翻译： 为集成电路提供静电放电（ESD）保护。 与现代设计相比，提供了较低的初始临界电压和临界电流。 具有掺杂区域的动态区域形成在基板上，与动态区域接触。 动态区域包括Nwell区域，P阱区域和浅扩散，限定PNP区域，NPN区域和电压击穿区域。 在一方面，N阱区包括第一N +接触，第​​一P +接触和N +掺杂增强，而P阱区包括第二N +接触，第​​二P +接触和P +掺杂增强。 N +掺杂的增强接触形成其间的击穿电压区域的P +掺杂增强，在一种情况下形成掩埋击穿电压结。 通过改变各种掺杂区域的掺杂水平，宽度和定位，提供了击穿电压，NPN临界电压，NPN临界电流和PNP临界电流的独立控制。

公开(公告)号：US5118634A

公开(公告)日：1992-06-02

申请号：US588613

申请日：1990-09-26

申请人： Gerold W. Neudeck ,  Jack L. Glenn, Jr.

发明人： Gerold W. Neudeck ,  Jack L. Glenn, Jr.

IPC分类号： H01L21/20 ,  H01L21/285 ,  H01L21/316 ,  H01L21/331

CPC分类号： H01L29/66287 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/28525 ,  H01L21/31662 ,  H01L29/66272 ,  Y10S148/011

摘要： An integrated circuit vertical bipolar transistor includes monocrystalline emitter, base and collector contacts for electrically contacting the transistor's emitter, base and collector regions, respectively. The collector, base contact and emitter contact are preferably insulated from one another by oxide regions which are formed from the monocrystalline collector and monocrystalline base contacts. Since all of the contacts are formed of monocrystalline material and the oxide isolation is formed from monocrystalline material, high performance devices are formed.The process of forming the transistor self aligns the base to the collector and the emitter to the base. The monocrystalline base contact is also self aligned to the base and the monocrystalline emitter contact is self aligned to the emitter. The process preferably uses epitaxial lateral overgrowth and selective epitaxial growth from a mesa region to form the monocrystalline contacts. A shallow phosphorus implant into the base contact is used to preferentially grow the oxide between the base contact and emitter contact.

公开(公告)号：US07619262B2

公开(公告)日：2009-11-17

申请号：US11600510

申请日：2006-11-16

申请人： Jack L. Glenn ,  Mark W. Gose

发明人： Jack L. Glenn ,  Mark W. Gose

IPC分类号： H01L29/76

CPC分类号： H01L27/0262

摘要： Electrostatic discharge (ESD) protection is provided for an integrated circuit. In an aspect, a dynamic region having doped regions is formed on an epitaxy layer and substrate, and interconnects contact the dynamic region. In an aspect, the dynamic region operates as a back-to-back SCR that snaps back in both positive and negative voltage directions. In an aspect the dynamic region operates as an SCR that snaps back in a positive voltage direction and operates as a simple diode in a negative voltage direction. In another aspect, the dynamic region operates as an SCR that snaps back in a negative voltage direction and operates as a simple diode in a positive voltage direction. ESD protection over an adjustable and wide positive and negative voltage range is provided by varying widths and positioning of various doping regions. Breakdown voltages, critical voltages and critical currents are independently controlled.

摘要翻译： 为集成电路提供静电放电（ESD）保护。 在一方面，具有掺杂区域的动态区域形成在外延层和衬底上，并且互连接触动态区域。 在一个方面，动态区域作为背靠背SCR在正电压和负电压方向上反弹地工作。 在一个方面，动态区域作为SCR在正电压方向上反弹并作为负电压方向上的简单二极管工作。 另一方面，动态区域作为SCR反向工作，并以正电压方向作为简单的二极管工作。 通过改变各种掺杂区域的宽度和定位来提供可调和宽的正负电压范围内的ESD保护。 击穿电压，临界电压和临界电流是独立控制的。

公开(公告)号：US07470955B2

公开(公告)日：2008-12-30

申请号：US11107084

申请日：2005-04-15

申请人： Jack L. Glenn ,  Troy D. Clear ,  Mark W. Gose ,  Doublas B. Osborn ,  Nicholas T. Campanile

发明人： Jack L. Glenn ,  Troy D. Clear ,  Mark W. Gose ,  Doublas B. Osborn ,  Nicholas T. Campanile

IPC分类号： H01L29/06

CPC分类号： H01L29/7809 ,  H01L27/0722 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/7815 ,  H01L29/7816 ,  H01L29/7826 ,  H03K17/0822

摘要： An integrated circuit (IC) with negative potential protection includes at least one double-diffused metal-oxide semiconductor (DMOS) cell formed in a first-type epitaxial pocket, which is formed in a second-type substrate. The IC also includes a second-type+ isolation ring formed in the substrate to isolate the first-type epitaxial pocket and a first-type+ ring formed through the first-type epitaxial pocket between the second-type+ isolation ring and the DMOS cell.

摘要翻译： 具有负电位保护的集成电路（IC）包括形成在第二型衬底中的第一型外延袋中形成的至少一个双扩散金属氧化物半导体（DMOS）单元。 该IC还包括形成在衬底中以隔离第一型外延袋的第二型+隔离环和通过第二型+隔离环与DMOS电池之间的第一型外延袋形成的第一型+环。

公开(公告)号：US20080116480A1

公开(公告)日：2008-05-22

申请号：US11600510

申请日：2006-11-16

申请人： Jack L. Glenn ,  Mark W. Gose

发明人： Jack L. Glenn ,  Mark W. Gose

IPC分类号： H01L23/60 ,  H01L21/332

CPC分类号： H01L27/0262

摘要： Electrostatic discharge (ESD) protection is provided for an integrated circuit. In an aspect, a dynamic region having doped regions is formed on an epitaxy layer and substrate, and interconnects contact the dynamic region. In an aspect, the dynamic region operates as a back-to-back SCR that snaps back in both positive and negative voltage directions. In an aspect the dynamic region operates as an SCR that snaps back in a positive voltage direction and operates as a simple diode in a negative voltage direction. In another aspect, the dynamic region operates as an SCR that snaps back in a negative voltage direction and operates as a simple diode in a positive voltage direction. ESD protection over an adjustable and wide positive and negative voltage range is provided by varying widths and positioning of various doping regions. Breakdown voltages, critical voltages and critical currents are independently controlled.

摘要翻译： 为集成电路提供静电放电（ESD）保护。 在一方面，具有掺杂区域的动态区域形成在外延层和衬底上，并且互连接触动态区域。 在一个方面，动态区域作为背靠背SCR在正电压和负电压方向上反弹地工作。 在一个方面，动态区域作为SCR在正电压方向上反弹并作为负电压方向上的简单二极管工作。 另一方面，动态区域作为SCR反向工作，并以正电压方向作为简单的二极管工作。 通过改变各种掺杂区域的宽度和定位来提供可调和宽的正负电压范围内的ESD保护。 击穿电压，临界电压和临界电流是独立控制的。

公开(公告)号：US20110112792A1

公开(公告)日：2011-05-12

申请号：US12999131

申请日：2009-07-23

申请人： Jack L. Glenn ,  Mark A. Gose ,  Peter A. Laubenstein ,  Seyed R. Zarabadi

发明人： Jack L. Glenn ,  Mark A. Gose ,  Peter A. Laubenstein ,  Seyed R. Zarabadi

IPC分类号： G01K7/16

CPC分类号： G01K7/01 ,  G01K7/427 ,  G01K2217/00

摘要： An apparatus and method of determining the junction temperature (Tj) and drain-source current (Ids) of a standard FET within a multi-FET module includes a control IC managing one or more 3 terminal standard FETs within the same package, calculating Tj and Tds for one or more FETs in one or more packages, and protecting each FET against short circuit faults while allowing high current transients, such as inrush currents from a lamp load.

摘要翻译： 确定多FET模块内的标准FET的结温（Tj）和漏 - 源电流（Ids）的装置和方法包括管理同一封装内的一个或多个3个端子标准FET的控制IC，计算Tj和 Tds用于一个或多个封装中的一个或多个FET，并且保护每个FET免于短路故障，同时允许高电流瞬变，例如来自灯负载的浪涌电流。

公开(公告)号：US07601990B2

公开(公告)日：2009-10-13

申请号：US11586412

申请日：2006-10-25

申请人： Jack L. Glenn

发明人： Jack L. Glenn

IPC分类号： H01L29/72

CPC分类号： H01L27/0262 ,  H01L29/7436 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary designs. A dynamic region having doped regions is formed on a substrate, interconnects contacting the dynamic region. The dynamic region includes an Nwell region, a Pwell region and shallow diffusions, defining a PNP region, an NPN region and a voltage Breakdown region. In an aspect, the Nwell region includes a first N+ contact, a first P+ contact and an N+ doped enhancement, while the Pwell region includes a second N+ contact, a second P+ contact and a P+ doped enhancement. The N+ doped enhancement contacts the P+ doped enhancement forming the breakdown voltage region therebetween, in one case forming a buried breakdown voltage junction. Independent control is provided over breakdown voltage, NPN critical voltage, NPN critical current and PNP critical current, by varying doping levels, widths and positioning of various doping regions.

摘要翻译： 为集成电路提供静电放电（ESD）保护。 与现代设计相比，提供了较低的初始临界电压和临界电流。 具有掺杂区域的动态区域形成在基板上，与动态区域接触。 动态区域包括Nwell区域，P阱区域和浅扩散，限定PNP区域，NPN区域和电压击穿区域。 在一方面，N阱区包括第一N +接触，第​​一P +接触和N +掺杂增强，而P阱区包括第二N +接触，第​​二P +接触和P +掺杂增强。 N +掺杂的增强接触形成其间的击穿电压区域的P +掺杂增强，在一种情况下形成掩埋击穿电压结。 通过改变各种掺杂区域的掺杂水平，宽度和定位，提供了击穿电压，NPN临界电压，NPN临界电流和PNP临界电流的独立控制。