公开(公告)号：US20170125441A1

公开(公告)日：2017-05-04

申请号：US15404369

申请日：2017-01-12

Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Shoufu JIAN ,  Zhaokeng CAO ,  Zhiqiang XIA

IPC: H01L27/12 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: G02F1/136286 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  H01L27/1222 ,  H01L29/78645 ,  H01L29/78696

Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a substrate, and a plurality of scanning lines and a plurality of data lines disposed on the substrate. The plurality of scanning lines and the plurality of data lines are insulated and intersected to define a plurality of pixel units. Each pixel unit includes a thin film transistor and a pixel electrode, a gate electrode of the thin film transistor is electrically connected to a scanning line, a source electrode is electrically connected to a data line, and a drain electrode is electrically connected to the pixel electrode. An active layer of the thin film transistor includes at least one channel region including first sub-channel region and at least one second sub-channel region. A first width of the first sub-channel region is smaller than a second width of the second sub-channel region.

公开(公告)号：US20220137463A1

公开(公告)日：2022-05-05

申请号：US17125535

申请日：2020-12-17

Applicant: Shanghai AVIC OPTO Electronics Co.,Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Feng QIN ,  Zhiqi CHEN ,  Dandan QIN ,  Shoufu JIAN

IPC: G02F1/1335 ,  G02F1/13357

Abstract: A light-emitting structure, a backlight module, a display module, and a display device are provided. The light-emitting structure includes a circuit substrate, including a first surface and a second surface sequentially arranged along a light-exiting direction of the light-emitting structure. The circuit substrate also includes a light-transparent substrate and a wiring structure located on a side of the light-transparent substrate in a thickness direction. The light-emitting structure also includes a plurality of light-emitting elements, arranged in an array on one of the first surface or the second surface of the circuit substrate. The plurality of the light-emitting elements is electrically connected to the wiring structure. The light-emitting structure also includes a heat sink, located on a side of the first surface of the circuit substrate. The heat sink is configured for dissipating heat generated by the plurality of the light-emitting elements.

公开(公告)号：US20150279287A1

公开(公告)日：2015-10-01

申请号：US14465737

申请日：2014-08-21

Applicant: Shanghai Avic Opto Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Bo LIU ,  Jiongliang FU ,  Shoufu JIAN ,  Zhiqiang XIA ,  Kerui XI

IPC: G09G3/36 ,  G02F1/1335 ,  G06F3/041 ,  H05K1/02 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: G09G3/36 ,  G02F1/13338 ,  G02F1/133514 ,  G02F1/134309 ,  G02F1/1368 ,  G02F2001/134372 ,  G06F3/0412 ,  G06F2203/04101 ,  G06F2203/04103 ,  G09G3/3659 ,  G09G3/3666 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2310/0202 ,  G09G2310/0208 ,  G09G2310/0218 ,  G09G2310/0262 ,  G09G2310/0267 ,  G09G2310/027 ,  G09G2320/0613 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259 ,  H05K1/02

Abstract: A pixel structure is disclosed. The pixel structure includes a substrate, a plurality of scan lines, and a plurality of data lines crossing the scan lines to form pixel unit areas, where the data lines are insulated from the scan lines. The pixel structure also includes a plurality of first electrodes formed in the pixel unit areas, a plurality of second electrodes insulated from the first electrodes and located closer to the substrate than the first electrodes, and a plurality of signal lines located in a same layer as topmost electrodes farthest from the substrate, where the signal lines are arranged to be insulated from the topmost electrodes.

Abstract translation: 公开了像素结构。 像素结构包括衬底，多条扫描线和与扫描线交叉的多条数据线，以形成像素单位区域，其中数据线与扫描线绝缘。 像素结构还包括形成在像素单元区域中的多个第一电极，与第一电极绝缘并且位于比第一电极更靠近衬底的多个第二电极，以及位于与第一电极相同的层中的多个信号线 距离基板最远的最远的电极，其中信号线布置成与最上面的电极绝缘。

公开(公告)号：US20190050100A1

公开(公告)日：2019-02-14

申请号：US16164801

申请日：2018-10-19

Applicant: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.

Inventor： Yufang MA ,  Huijun JIN ,  Shoufu JIAN ,  Zhiqiang XIA

IPC: G06F3/041 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/1333 ,  G06F3/044

Abstract: Provided are an array substrate, a display panel, and a display device. The array substrate includes a base substrate, scanning lines extending along first direction and data lines extending along second direction disposed on base substrate, pixel units arranged in an array along first direction and second direction; touch electrodes and touch traces disposed on base substrate, and a first insulating layer disposed between the touch traces and the touch electrodes in a direction perpendicular to base substrate. Each touch trace is connected to the touch electrodes via a first through hole in the first insulating layer. Two scanning lines are disposed between two adjacent pixel units in the second direction, and each scanning line controls its adjacent pixel unit. An orthographic projection of the first through hole on the base substrate is located between the two scanning lines and does not overlap with them.

公开(公告)号：US20200258586A1

公开(公告)日：2020-08-13

申请号：US16861238

申请日：2020-04-29

Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.

Inventor： Huijun JIN ,  Dandan QIN ,  Shoufu JIAN

IPC: G11C19/28 ,  G09G3/36 ,  G09G3/20

Abstract: Provided are a shift register, a gate drive circuit and a display panel. The shift register includes a reset module, where a first control terminal of the reset module is electrically connected to a first reset-signal input terminal, a second control terminal of the reset module is electrically connected to a second reset-signal input terminal, an input terminal of the reset module is electrically connected to a second power-signal input terminal, a first output terminal of the reset module is electrically connected to a first node, and a second output terminal of the reset module is electrically connected to a scanning-signal output terminal. In the third phase, the potential of the first node P is at a second level, each of potentials of the first control terminal and the second control terminal of the reset module is at the second level.

公开(公告)号：US20200075112A1

公开(公告)日：2020-03-05

申请号：US16230484

申请日：2018-12-21

Applicant: Shanghai AVIC OPTO Electronics Co.,Ltd.

Inventor： Rili FEI ,  Zhiqiang XIA ,  Dandan QIN ,  Dongliang DUN ,  Shoufu JIAN ,  Tinghai WANG ,  Ying XIE ,  Houxun XIA

IPC: G11C19/28 ,  G09G3/20 ,  G06F3/041

Abstract: A shift register includes a forward/backward scan-control module, configured to transmit a signal of a forward-scan-signal terminal or a signal of a backward-scan-signal terminal to a first node; an interlock module, configured to transmit a signal of a first voltage terminal to a second node, and transmit a signal of a second voltage terminal to the first node; a pull-down module, configured to transmit the signal of the first voltage terminal to a gate-signal output terminal; an output module, configured to transmit a signal of a second clock-signal terminal to the gate-signal output terminal; and a reset module, configured to transmit the signal of the second voltage terminal to the first node, and transmit the signal of the first voltage terminal to the gate-signal output terminal. The disclosed shift register can prevent leakage of the first node, and thus improve the quality and the performance of the shift register.

公开(公告)号：US20170125442A1

公开(公告)日：2017-05-04

申请号：US15404524

申请日：2017-01-12

Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Shoufu JIAN ,  Lina SUN ,  Yiming WANG

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F2001/13685 ,  H01L27/1222 ,  H01L27/3262 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/78696

Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a substrate, and a plurality of scanning lines and a plurality of data lines disposed on the substrate. The plurality of scanning lines and the plurality of data lines are insulated and intersected to define a plurality of pixel units. Each pixel unit includes a thin film transistor and a pixel electrode. A gate electrode of the thin film transistor is electrically connected to a scanning line, a source electrode of the thin film transistor is electrically connected to a data line, and a drain electrode of the thin film transistor is electrically connected to the pixel electrode. An effective length of a channel region of the thin film transistor is longer than or equal to one third of a length of the pixel unit along an extension direction of the scanning line.