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公开(公告)号：US12107101B2
公开(公告)日：2024-10-01
申请号：US17546740
申请日：2021-12-09
Inventor： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Zhenyu Jia
IPC: H01L27/146 , H01L25/16
CPC classification number: H01L27/14618 , H01L25/167 , H01L27/1462 , H01L27/14627 , H01L27/14636
Abstract: The present disclosure provides chip package structure, packaging method, camera module and electronic equipment. The package structure includes chip package module, which includes light-transmitting substrate, wiring layer located on side of light-transmitting substrate and including first metal wire, conductor located on side of wiring layer facing away from light-transmitting substrate, photosensitive chip located on side of wiring layer facing away from the light-transmitting substrate, active chip located on side of wiring layer facing away from light-transmitting substrate, and plastic encapsulation layer encapsulating photosensitive chip and active chip. The conductor includes first end electrically connected to first metal wire, and second end. The photosensitive chip includes pin electrically connected to first metal wire and has photosensitive surface facing towards light-transmitting substrate. The photosensitive surface includes photosensitive region that is not overlapping first metal wire. The active chip includes pin electrically connected to first metal wire.
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2.发明授权公开(公告)号：US11581196B2
公开(公告)日：2023-02-14
申请号：US16913020
申请日：2020-06-26
Inventor： Xuhui Peng , Kerui Xi , Tingting Cui , Feng Qin , Jie Zhang
IPC: H01L21/48 , H01L21/56 , H01L23/498 , H01L23/00
Abstract: A semiconductor package and a method of forming the semiconductor package are provided. The method includes providing a first substrate, forming a wiring structure containing at least two first wiring layers, disposing a first insulating layer between adjacent two first wiring layers, and patterning the first insulating layer to form a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The method also includes providing at least one semiconductor element each including a plurality of pins. In addition, the method includes disposing the plurality of pins of the each semiconductor element on a side of the wiring structure away from the first substrate. Further, the method includes encapsulating the at least one semiconductor element, and placing a ball on a side of the wiring structure away from the at least one semiconductor element.
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3.发明授权公开(公告)号：US11334740B2
公开(公告)日：2022-05-17
申请号：US16910840
申请日：2020-06-24
Inventor： Kerui Xi , Tingting Cui , Feng Qin , Xuhui Peng , Linzhi Wang
Abstract: Fingerprint recognition circuit, fingerprint recognition structure, fingerprint recognition device, display panel, and display device are provided. The circuit includes: a fingerprint recognition driving transistor; a first capacitor; a driving signal input terminal; and a sensing signal output terminal. The first capacitor has a terminal electrically connected to a gate of the fingerprint recognition driving transistor and another terminal electrically connected to a ground. The driving signal input terminal is electrically connected to an input terminal of the fingerprint recognition driving transistor. An output terminal of the fingerprint recognition driving transistor is electrically connected to the sensing signal output terminal.
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公开(公告)号：US20210229096A1
公开(公告)日：2021-07-29
申请号：US17231842
申请日：2021-04-15
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Baiquan LIN , Kerui Xi , Zhenyu Jia , Junting Ouyang , Feng Qin , Xuhui Peng
Abstract: A microfluidic device includes: first substrate, microfluidic channel layer, and second substrate; the first substrate includes light source layer including a plurality of light source structures, the light source structure includes first electrode, second electrode, and an electroluminescence module, and when being turned on, emits light passing through the microfluidic channel layer and irradiating the second substrate; the second substrate includes photoelectric detection layer including a plurality of photoelectric detection structures and driving electrode layer including a plurality of driving electrodes and a plurality of driving circuits, the photoelectric detection structure includes third electrode, fourth electrode, and photoelectric conversion module arranged therebetween, and when being turned on, generates an electrical signal according to an incident light signal; the driving circuit is configured to apply a voltage to each driving electrode such that a droplet moves in a microfluidic channel of the microfluidic channel layer.
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公开(公告)号：US11764181B2
公开(公告)日：2023-09-19
申请号：US17829619
申请日：2022-06-01
Inventor： Feng Qin , Kerui Xi , Tingting Cui , Jie Zhang , Xuhui Peng
CPC classification number: H01L24/19 , H01L21/561 , H01L23/3121 , H01L24/11 , H01L24/13 , H01L24/20 , H01L24/81 , H01L24/96 , H01L24/97 , H01L2224/2101 , H01L2924/37001
Abstract: Provided are a semiconductor package and a method for fabricating the semiconductor package. The method includes the followings steps: a first workpiece is provided, where the first workpiece includes a first substrate and multiple first rewiring structures arranged on the first substrate at intervals, and each first rewiring structure includes at least two first rewiring layers; an encapsulation layer is formed on the first rewiring structures, where the encapsulation layer is provided with multiple first through holes, and the first through holes expose one first rewiring layer; at least two second rewiring layers are disposed on a side of the encapsulation layer facing away from the first rewiring layer; multiple semiconductor elements are provided, where the semiconductor elements are arranged on a side of the first rewiring structures facing away from the encapsulation layer, where the first rewiring layers are electrically connected to pins of the semiconductor elements.
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Patent Agency Ranking
公开(公告)号：US20220077596A1
公开(公告)日：2022-03-10
申请号：US17530425
申请日：2021-11-18
Inventor： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Zhenyu Jia
Abstract: Disclosed antenna unit includes first substrate and second substrate opposite to each other, phase shifting units and driver circuit. Region facing the first substrate and the second substrate form phase shifting region. In first direction, the first substrate formed with first step region, and used for connecting radio-frequency signal terminal; in second direction, the second substrate formed with second step region, and included angle between the first direction and the second direction greater than or equal to 0° and smaller than 180°. At least part of the first step region does not overlap at least part of the second step region. Phase shifting units used for radiating radio-frequency signal and distributed in phase shifting region, each phase shifting unit. At least part of the driver circuit disposed in the second step region and the driver circuit electrically connected to each phase shifting unit to adjust radio-frequency signal.
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公开(公告)号：US20210351150A1
公开(公告)日：2021-11-11
申请号：US16917155
申请日：2020-06-30
Inventor： Feng Qin , Kerui Xi , Tingting Cui , Jie Zhang , Xuhui Peng
Abstract: Provided are a semiconductor package and a method for fabricating the semiconductor package. The method includes followings steps: a first workpiece is provided, where the first workpiece includes a first substrate and multiple first rewiring structures arranged on the first substrate at intervals, and each first rewiring structure includes at least two first rewiring layers; an encapsulation layer is formed on the first rewiring structures, where the encapsulation layer is provided with multiple first through holes, and the first through holes exposes one first rewiring layer; at least two second rewiring layers are disposed on a side of the encapsulation layer facing away from the first rewiring layer; multiple semiconductor elements are provided, where the semiconductor elements are arranged on a side of the first rewiring structures facing away from the encapsulation layer, where the first rewiring layers are electrically connected to pins of the semiconductor elements.
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8.发明授权公开(公告)号：US10790225B1
公开(公告)日：2020-09-29
申请号：US16441243
申请日：2019-06-14
Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.
Inventor： Kerui Xi , Feng Qin , Jine Liu , Xiaohe Li , Tingting Cui , Xuhui Peng
IPC: H01L23/522 , H01L23/31 , H01L21/56 , H01L49/02 , H01L25/16 , H01L23/528
Abstract: Chip package structure and chip package method are provided. The chip package structure includes an encapsulating layer, a first metal layer, a second metal layer, and bare chips. The bare chips include first bare chips and second bare chips. First-connecting-posts are formed on a side of the first bare chips and on a side of the second bare chips. The encapsulating layer covers the bare chips and the first-connecting-posts. The first metal layer is disposed on the side of the first-connecting-posts away from the bare chips and includes first capacitor polar plates and conductive parts. The first capacitor polar plates are electrically connected to the first-connecting-posts on the first bare chips, and the conductive parts are electrically connected to the first-connecting-posts on the second bare chips. The second metal layer is disposed on a side of the first metal layer away from the encapsulating layer and includes second capacitor polar plates electrically connected to the conductive parts.
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公开(公告)号：US12057324B2
公开(公告)日：2024-08-06
申请号：US18090918
申请日：2022-12-29
Inventor： Xuhui Peng , Kerui Xi , Tingting Cui , Feng Qin , Jie Zhang
IPC: H01L21/48 , H01L21/56 , H01L23/00 , H01L23/498
CPC classification number: H01L21/4853 , H01L21/486 , H01L21/4896 , H01L21/561 , H01L23/49816 , H01L23/49822 , H01L24/81 , H01L24/96 , H01L24/97 , H01L2924/37001
Abstract: A semiconductor package includes a semiconductor element, a wiring structure, an encapsulation structure, and a solder ball. The semiconductor element includes a plurality of pins. A side of the wiring structure is electrically connected to the plurality of pins of the semiconductor element. The wiring structure includes at least two first wiring layers. A first insulating layer is disposed between adjacent two first wiring layers of the at least two first wiring layers. The first insulating layer includes a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The encapsulation structure at least partially surrounds the semiconductor element. The solder ball is located on a side of the wiring structure away from the semiconductor element. The solder ball is electrically connected to the at least two first wiring layers.
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公开(公告)号：US11824262B2
公开(公告)日：2023-11-21
申请号：US17361356
申请日：2021-06-29
Inventor： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Baiquan Lin
CPC classification number: H01Q1/005 , H01Q5/371 , H01Q21/065
Abstract: Provided are an antenna, a phase shifter, and a communication device. The antenna includes a first metal electrode, a second metal electrode, and a photo-sensitive layer. The first metal electrode and the second metal electrode are respectively located on two opposite sides of the photo-sensitive layer. The first metal electrode includes multiple transmission electrodes. The multiple transmission electrodes are configured to transmit electrical signals. The photo-sensitive layer includes at least one photo-sensitive unit and the at least one photo-sensitive unit overlaps the transmission electrodes. The antenna provides more possibilities for large-scale commercialization.
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