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公开(公告)号：US20070109174A1
公开(公告)日：2007-05-17
申请号：US11651018
申请日：2007-01-09
申请人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
发明人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
IPC分类号： H03M1/12
CPC分类号： H03M1/1225 , H03M1/167
摘要： One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.
摘要翻译： 一个或多个输入电容器连接到运算放大器的反相输入端。 连接到各个输入电容器的开关用于对输入信号的输入进行开关控制，用于开关控制另一个输入信号的输入，用于开关控制更高参考电压的输入，以及 用于开关控制较低参考电压的输入。 用于对输入信号的输入的开关控制的开关和用于另一个输入信号的输入的开关控制的开关由独立的控制信号控制。
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公开(公告)号：US20050219111A1
公开(公告)日：2005-10-06
申请号：US11073720
申请日：2005-03-08
申请人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
发明人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
CPC分类号： H03M1/1225 , H03M1/167
摘要： One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.
摘要翻译： 一个或多个输入电容器连接到运算放大器的反相输入端。 连接到各个输入电容器的开关用于对输入信号的输入进行开关控制，用于开关控制另一个输入信号的输入，用于开关控制更高参考电压的输入，以及 用于开关控制较低参考电压的输入。 用于对输入信号的输入的开关控制的开关和用于另一个输入信号的输入的开关控制的开关由独立的控制信号控制。
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公开(公告)号：US07119729B2
公开(公告)日：2006-10-10
申请号：US11060306
申请日：2005-02-18
申请人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
发明人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
IPC分类号： H03M1/38
摘要： A first analog-digital converter circuit in a preceding stage converts an input analog signal into a digital value and retrieves the higher 4 bits. A second analog-digital converter circuit in a subsequent stage converts an input analog signal into a digital value and retrieves 3 bits including the 5th through 6th highest bits and a redundant bit, 3 bits including the 7th through 8th highest bits and a redundant bit, and 3 bits including the 9th through 10th highest bits and a redundant bit. Thus, the number of bits produced by conversion by the second analog-digital converter circuit in the subsequent stage of a cyclic type is configured to be smaller than the number of bits produced by conversion by the first analog-digital converter circuit in the preceding stage.
摘要翻译： 前一级的第一模数转换器电路将输入的模拟信号转换为数字值，并检索较高的4位。 后续阶段的第二模拟数字转换器电路将输入的模拟信号转换为数字值，并且检索包括第5至第6高位的3位和冗余位，包括第7位至第8位的3位和冗余位， 并且包括第9到第10最高位的3位和冗余位。 因此，通过第二模拟数字转换器电路在循环类型的后续阶段的转换而产生的位数被配置为小于由前一级中的第一模数转换器电路的转换产生的位数 。
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公开(公告)号：US07088277B2
公开(公告)日：2006-08-08
申请号：US10945924
申请日：2004-09-22
IPC分类号： H03M1/12
摘要： A cyclic AD converter having a conversion processing speed or conversion accuracy designed no higher than necessary. In the AD converter, an input analog signal is held by a sample-and-hold circuit, and converted into a digital value by an AD conversion circuit. A DA conversion circuit converts the digital value output from the AD conversion circuit into an analog value. A subtractor circuit outputs the difference between the analog value output from the AD conversion circuit and the analog value held in the sample-and-hold circuit. An amplifier circuit amplifies the output of the subtractor circuit, and feeds back the resultant to the sample-and-hold circuit and the AD conversion circuit. In the course of this feedback-based cyclic processing, an amplification control circuit changes the gain of the amplifier circuit in accordance with the progress of the circulation.
摘要翻译： 一种循环AD转换器，其转换处理速度或转换精度设定为不必要。 在AD转换器中，输入模拟信号由采样保持电路保持，并由AD转换电路转换为数字值。 DA转换电路将从AD转换电路输出的数字值转换为模拟值。 减法器电路输出从AD转换电路输出的模拟值与保持在采样保持电路中的模拟值之间的差。 放大器电路放大减法器电路的输出，并将结果反馈到采样保持电路和AD转换电路。 在基于反馈的循环处理的过程中，放大控制电路根据循环的进行改变放大器电路的增益。
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公开(公告)号：US07084803B2
公开(公告)日：2006-08-01
申请号：US11047706
申请日：2005-02-02
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
摘要： A first amplifier circuit amplifies an input signal by a factor of α. A first AD converter circuit is configured at an LSB voltage of VA and converts an input analog signal into a digital value of arbitrary N1 bits. A first DA converter circuit converts the digital value output from the first AD converter circuit into an analog signal. A subtracter circuit subtracts an output of the first DA converter circuit from an output of the first subtracter circuit. A second amplifier circuit amplifies an output of the subtracter circuit by a factor of β. A second AD converter is configured at an LSB voltage of VB and converts an input analog signal into a digital value of arbitrary N2 bits. In this circuit, the relation VA*α*β=VB*2N2 holds.
摘要翻译： 第一放大器电路以α的因子放大输入信号。 第一AD转换器电路配置为VA的LSB电压，并将输入的模拟信号转换成任意N 1位的数字值。 第一DA转换器电路将从第一AD转换器电路输出的数字值转换为模拟信号。 减法电路从第一减法器电路的输出中减去第一DA转换器电路的输出。 第二放大器电路将减法器电路的输出放大倍数为β。 第二AD转换器配置为VB的LSB电压，并将输入模拟信号转换为任意N 2位的数字值。 在该电路中，VA *α*β= VB * 2 N 2的关系成立。
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公开(公告)号：US07002507B2
公开(公告)日：2006-02-21
申请号：US10945880
申请日：2004-09-22
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
CPC分类号： H03M1/1225 , H03M1/162 , H03M1/167
摘要： A need exists to provide an AD converter which is well balanced between an increase in processing speed and a decrease in circuit area. The AD converter performs an analog-to-digital conversion separately in four steps, while performing pipelined processing on an AD conversion of the first stage by a first AD conversion circuit and AD conversions of the second to fourth steps by a second AD conversion circuit. A DA conversion circuit, a subtractor circuit, and an amplifier circuit are utilized in a DA conversion, subtraction, and amplification in the first step as well as in DA conversions, subtractions, and amplifications in the second to fourth steps, thus shared in all the steps.
摘要翻译： 需要提供在处理速度的提高和电路面积的减小之间良好平衡的AD转换器。 AD转换器分四步执行模数转换，同时通过第一AD转换电路对第一级的AD转换进行流水线处理，并通过第二AD转换电路对第二至第四步进行AD转换。 在第一步中的DA转换，减法和放大以及第二至第四步中的DA转换，减法和放大中都使用DA转换电路，减法器电路和放大器电路，因此共享 步骤。
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公开(公告)号：US20050174277A1
公开(公告)日：2005-08-11
申请号：US11052093
申请日：2005-02-08
申请人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
发明人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
摘要： A first amplifier circuit samples and holds an input analog signal and outputs the same to a subtracting circuit. An AD converter circuit converts the input analog signal into a digital value so as to retrieve a predetermined number of bits. A DA converter circuit converts the digital value derived from conversion by the AD converter circuit into an analog value. A subtracter circuit subtracts an output analog signal from the DA converter circuit from the analog signal input via a first switch or the first amplifier circuit. A second amplifier circuit amplifies an output analog signal from the subtracter circuit by a gain of 2 and outputs the amplified signal. An input switching circuit controls the order of inputs, i.e. the input analog signal and a reference voltage, to voltage comparison elements constituting the Ad converter circuit.
摘要翻译： 第一放大器电路对输入的模拟信号进行采样并保持，并将其输出到减法电路。 AD转换器电路将输入的模拟信号转换为数字值，以便检索预定数量的位。 DA转换器电路将由AD转换器电路的转换得到的数字值转换为模拟值。 减法电路经由第一开关或第一放大器电路从DA转换器电路的模拟信号输入中减去输出模拟信号。 第二放大器电路将来自减法器电路的输出模拟信号以2的增益放大并输出放大的信号。 输入开关电路将输入的顺序，即输入模拟信号和参考电压控制到构成Ad转换器电路的电压比较元件。
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公开(公告)号：US20060279447A1
公开(公告)日：2006-12-14
申请号：US11506778
申请日：2006-08-21
申请人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
发明人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
IPC分类号： H03M1/12
CPC分类号： H01L29/1083 , H01L21/26513 , H01L21/26586 , H01L29/6659 , H01L29/7833 , H03M1/005 , H03M1/007 , H03M1/162 , H03M1/167
摘要： The present invention provides a widely general-purpose A/D converting device. The A/D converting device comprises multiple signal conversion units each of which include: an A/D converter for converting an input analog signal into a digital signal with a predetermined number of bits; a D/A converter for converting the output from the A/D converter into an analog signal; a subtracter for subtracting the output signal from the D/A converter, from the input analog signal; and an amplifier for amplifying the output signal from the subtracter. The A/D converting device has a configuration wherein the signal conversion units are arrayed in multiple rows and columns. This allows the user to realize an A/D converting device having various types and levels of performance by making various combinations of the signal conversion units without change of the layout of the signal conversion units.
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公开(公告)号：US07061420B2
公开(公告)日：2006-06-13
申请号：US11072297
申请日：2005-03-07
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
IPC分类号： H03M1/12
CPC分类号： H03M1/167
摘要： A first amplifier circuit samples and amplifies an input analog signal by a gain of 0.8 and outputs the amplified signal to a first subtracter circuit. A first analog-digital converter circuit converts the input analog signal into a digital value so as to retrieve the higher 4 bits. A first digital-analog converter circuit converts the digital value produced by conversion by the first analog-digital converter circuit into an analog value. The first subtracter circuit subtracts an output analog signal from the first digital-analog converter circuit from an output analog signal from the first amplifier circuit. The output analog signal from the first digital-analog converter circuit is amplified by a gain of 0.8. By setting the gain of the first amplifier circuit to be below 1, an input voltage range is extended.
摘要翻译： 第一放大器电路以0.8的增益对输入的模拟信号进行采样和放大，并将放大的信号输出到第一减法器电路。 第一模拟数字转换器电路将输入的模拟信号转换为数字值，以便检索较高的4位。 第一数模转换器电路将由第一模数转换器电路的转换产生的数字值转换为模拟值。 第一减法器电路从第一放大电路的输出模拟信号中减去来自第一数模转换器电路的输出模拟信号。 来自第一数模转换器电路的输出模拟信号以0.8的增益放大。 通过将第一放大器电路的增益设置为低于1，可以延长输入电压范围。
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公开(公告)号：US20050168369A1
公开(公告)日：2005-08-04
申请号：US11047706
申请日：2005-02-02
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
摘要： A first amplifier circuit amplifies an input signal by a factor of α. A first AD converter circuit is configured at an LSB voltage of VA and converts an input analog signal into a digital value of arbitrary N1 bits. A first DA converter circuit converts the digital value output from the first AD converter circuit into an analog signal. A subtracter circuit subtracts an output of the first DA converter circuit from an output of the first subtracter circuit. A second amplifier circuit amplifies an output of the subtracter circuit by a factor of β. A second AD converter is configured at an LSB voltage of VB and converts an input analog signal into a digital value of arbitrary N2 bits. In this circuit, the relation VA*α*β=VB*2N2 holds.
摘要翻译： 第一放大器电路以α的因子放大输入信号。 第一AD转换器电路配置为VA的LSB电压，并将输入的模拟信号转换成任意N 1位的数字值。 第一DA转换器电路将从第一AD转换器电路输出的数字值转换为模拟信号。 减法电路从第一减法器电路的输出中减去第一DA转换器电路的输出。 第二放大器电路将减法器电路的输出放大倍数为β。 第二AD转换器配置为VB的LSB电压，并将输入模拟信号转换为任意N 2位的数字值。 在该电路中，VA *α*β= VB * 2 N 2的关系成立。
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