公开(公告)号：US07825473B2

公开(公告)日：2010-11-02

申请号：US11186086

申请日：2005-07-21

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H01L23/62

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US20110013326A1

公开(公告)日：2011-01-20

申请号：US12891474

申请日：2010-09-27

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H02H9/04 ,  H01L27/06

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US20120080716A1

公开(公告)日：2012-04-05

申请号：US13327171

申请日：2011-12-15

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H01L29/772

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US07692907B2

公开(公告)日：2010-04-06

申请号：US11717948

申请日：2007-03-13

申请人： Shih-Hung Chen ,  Ming-Dou Ker

发明人： Shih-Hung Chen ,  Ming-Dou Ker

IPC分类号： H02H9/00 ,  H02H3/20 ,  H02H9/04 ,  H02H3/22 ,  H01C7/12 ,  H02H1/00 ,  H02H1/04

CPC分类号： H01L27/0251 ,  H01L27/0292

摘要： A circuit capable of providing electrostatic discharge (ESD) protection, the circuit comprising a first set of power rails comprising a first high power rail and a first low power rail, a first interface circuit between the first set of power rails, the first interface circuit having at least one gate electrode, a first ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, and a second ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, the first ESD device and the second ESD device being configured to maintain a voltage level at the at least one gate electrode of the first interface circuit at approximately a ground level when ESD occurs.

摘要翻译： 一种能够提供静电放电（ESD）保护的电路，所述电路包括包括第一高功率轨道和第一低功率轨道的第一组电力轨道，所述第一组电力轨道之间的第一接口电路，所述第一接口电路 具有至少一个栅电极，第一ESD器件，其包括耦合到所述第一接口电路的所述至少一个栅电极的端子，以及包括耦合到所述第一接口电路的所述至少一个栅电极的端子的第二ESD器件， 第一ESD器件和第二ESD器件被配置为当ESD发生时将第一接口电路的至少一个栅电极的电压电平保持在大致的接地电平。

公开(公告)号：US20080062598A1

公开(公告)日：2008-03-13

申请号：US11740904

申请日：2007-04-26

申请人： Shih-Hung Chen ,  Ming-Dou Ker

发明人： Shih-Hung Chen ,  Ming-Dou Ker

IPC分类号： H02H9/04

CPC分类号： H01L27/0266

摘要： A circuit capable of providing electrostatic discharge (ESD) protection includes a first transistor including a first gate and a first source, the first gate being connected to a conductive pad, an impedance device between the first source and a first power rail capable of providing a resistor, a second transistor including a second gate and a second source, the second source being connected to the first power rail through the impedance device, and a clamp device between the first power rail and a second power rail, wherein the clamp device is capable of conducting a first portion of an ESD current and the second transistor is capable of conducting a second portion of the ESD current as the conductive pad is relatively grounded.

摘要翻译： 能够提供静电放电（ESD）保护的电路包括：第一晶体管，包括第一栅极和第一源极，第一栅极连接到导电焊盘，第一源极与能够提供 电阻器，包括第二栅极和第二源极的第二晶体管，所述第二源极通过所述阻抗器件连接到所述第一电力轨道，以及在所述第一电力轨道和第二电力轨道之间的夹紧装置，其中所述夹紧装置能够 导电ESD电流的第一部分，并且当导电焊盘相对接地时，第二晶体管能够导通ESD电流的第二部分。

公开(公告)号：US07848068B2

公开(公告)日：2010-12-07

申请号：US11740904

申请日：2007-04-26

申请人： Shih-Hung Chen ,  Ming-Dou Ker

发明人： Shih-Hung Chen ,  Ming-Dou Ker

IPC分类号： H02H9/00

CPC分类号： H01L27/0266

摘要： A circuit capable of providing electrostatic discharge (ESD) protection includes a first transistor including a first gate and a first source, the first gate being connected to a conductive pad, an impedance device between the first source and a first power rail capable of providing a resistor, a second transistor including a second gate and a second source, the second source being connected to the first power rail through the impedance device, and a clamp device between the first power rail and a second power rail, wherein the clamp device is capable of conducting a first portion of an ESD current and the second transistor is capable of conducting a second portion of the ESD current as the conductive pad is relatively grounded.

摘要翻译： 能够提供静电放电（ESD）保护的电路包括：第一晶体管，包括第一栅极和第一源极，第一栅极连接到导电焊盘，第一源极与能够提供 电阻器，包括第二栅极和第二源极的第二晶体管，所述第二源极通过所述阻抗器件连接到所述第一电力轨道，以及在所述第一电力轨道和第二电力轨道之间的夹紧装置，其中所述夹紧装置能够 导电ESD电流的第一部分，并且当导电焊盘相对接地时，第二晶体管能够导通ESD电流的第二部分。

公开(公告)号：US20080062597A1

公开(公告)日：2008-03-13

申请号：US11717948

申请日：2007-03-13

申请人： Shih-Hung Chen ,  Ming-Dou Ker

发明人： Shih-Hung Chen ,  Ming-Dou Ker

IPC分类号： H02H9/00

CPC分类号： H01L27/0251 ,  H01L27/0292

摘要： A circuit capable of providing electrostatic discharge (ESD) protection, the circuit comprising a first set of power rails comprising a first high power rail and a first low power rail, a first interface circuit between the first set of power rails, the first interface circuit having at least one gate electrode, a first ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, and a second ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, the first ESD device and the second ESD device being configured to maintain a voltage level at the at least one gate electrode of the first interface circuit at approximately a ground level when ESD occurs.

摘要翻译： 一种能够提供静电放电（ESD）保护的电路，所述电路包括包括第一高功率轨道和第一低功率轨道的第一组电力轨道，所述第一组电力轨道之间的第一接口电路，所述第一接口电路 具有至少一个栅电极，第一ESD器件，其包括耦合到所述第一接口电路的所述至少一个栅电极的端子，以及包括耦合到所述第一接口电路的所述至少一个栅电极的端子的第二ESD器件， 第一ESD器件和第二ESD器件被配置为当ESD发生时将第一接口电路的至少一个栅电极的电压电平保持在大致的接地电平。

公开(公告)号：US08102001B2

公开(公告)日：2012-01-24

申请号：US12891474

申请日：2010-09-27

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H01L23/62

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection includes a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，形成在衬底中的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US20070018193A1

公开(公告)日：2007-01-25

申请号：US11186086

申请日：2005-07-21

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H01L29/417

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US09368379B2

公开(公告)日：2016-06-14

申请号：US13419952

申请日：2012-03-14

申请人： Shih-Hung Chen ,  Ying Xiao ,  Chin-Hsiang Lin

发明人： Shih-Hung Chen ,  Ying Xiao ,  Chin-Hsiang Lin

IPC分类号： G06F15/00 ,  G01B11/26 ,  H01L21/67 ,  H01L21/68 ,  H01L21/687

CPC分类号： H01L21/67259 ,  H01L21/681 ,  H01L21/68764

摘要： A system and method of controlling a semiconductor wafer fabrication process. The method includes positioning a semiconductor wafer on a wafer support assembly in a wafer processing module. A signal is transmitted from a signal emitter positioned at a predetermined transmission angle relative to an axis normal to the wafer support assembly to check leveling of the wafer in the module, so that the signal is reflected from the wafer. The embodiment includes monitoring for the reflected signal at a predetermined reflectance angle relative to the axis normal to the wafer support assembly at a signal receiver. A warning indication is generated if the reflected signal is not received at the signal receiver.

摘要翻译： 一种控制半导体晶片制造工艺的系统和方法。 该方法包括将半导体晶片定位在晶片处理模块中的晶片支撑组件上。 信号从相对于垂直于晶片支撑组件的轴线以预定的传输角定位的信号发射器传输，以检查模块中晶片的调平，使得信号从晶片反射。 该实施例包括在信号接收器处相对于垂直于晶片支撑组件的轴以预定的反射角监视反射信号。 如果在信号接收器处未接收到反射信号，则会产生警告指示。