摘要:
An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a clamp unit and a control circuit. The clamp unit provides a discharging path from a first power line to a first ground line. The control circuit receives a first power voltage from the first power line and a second power voltage from a second power line. Wherein, when the first power voltage and the second power voltage are applied, the control circuit generates an isolation signal to disconnect the discharging path. When the first power voltage and the second power voltage are not applied, the control circuit generates a trigger signal according to an electrostatic signal from the first power line to turn on the discharging path.
摘要:
An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a clamp unit and a control circuit. The clamp unit provides a discharging path from a first power line to a first ground line. The control circuit receives a first power voltage from the first power line and a second power voltage from a second power line. Wherein, when the first power voltage and the second power voltage are applied, the control circuit generates an isolation signal to disconnect the discharging path. When the first power voltage and the second power voltage are not applied, the control circuit generates a trigger signal according to an electrostatic signal from the first power line to turn on the discharging path.
摘要:
A semiconductor device, an electrostatic discharge protection device and manufacturing method thereof are provided. The electrostatic discharge protection device includes a gate, a gate dielectric layer, an N-type source region, an N-type drain region, an N-type doped region and a P-type doped region. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The N-type source region and the N-type drain region are disposed in the substrate at two sides of the gate, respectively. The N-type doped region is disposed in the N-type drain region and connects to the top of the N-type drain region. The P-type doped region is disposed under the N-type drain region and connects to the bottom of the N-type drain region.
摘要:
An electrostatic discharge (ESD) protection device including a modified lateral silicon-controlled rectifier (MLSCR) and a voltage control circuit is provided. The MLSCR has a first terminal, a second terminal and a control terminal connected to a first P+-type doped region, where the first terminal and the second terminal are electrically connected to a first line and a second line, respectively. The voltage control circuit is electrically connected to the first line, the second line and the control terminal. When an electrostatic pulse is appeared on the first line, the voltage control circuit provides a current path from the first line to the control terminal. When an input signal is supplied to the first line, the voltage control circuit receives a power voltage, and stops providing the current path according to the power voltage.
摘要:
An electrostatic discharge (ESD) protection device including a modified lateral silicon-controlled rectifier (MLSCR) and a voltage control circuit is provided. The MLSCR has a first terminal, a second terminal and a control terminal connected to a first P+-type doped region, where the first terminal and the second terminal are electrically connected to a first line and a second line, respectively. The voltage control circuit is electrically connected to the first line, the second line and the control terminal. When an electrostatic pulse is appeared on the first line, the voltage control circuit provides a current path from the first line to the control terminal. When an input signal is supplied to the first line, the voltage control circuit receives a power voltage, and stops providing the current path according to the power voltage.
摘要:
A semiconductor device, an electrostatic discharge protection device and manufacturing method thereof are provided. The electrostatic discharge protection device includes a gate, a gate dielectric layer, an N-type source region, an N-type drain region, an N-type doped region and a P-type doped region. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The N-type source region and the N-type drain region are disposed in the substrate at two sides of the gate, respectively. The N-type doped region is disposed in the N-type drain region and connects to the top of the N-type drain region. The P-type doped region is disposed under the N-type drain region and connects to the bottom of the N-type drain region.
摘要:
An electrostatic discharge (ESD) protection device electronically connected to a pad is provided. The ESD protection device includes K PNP transistors and a protection circuit, wherein K is a positive integer. An emitter of the 1st PNP transistor is electronically connected to the pad, a base of the ith PNP transistor is electronically connected to an emitter of the (i+1)th PNP transistor, and collectors of the K PNP transistors are electronically connected to a ground, wherein i is an integer and 1≦i≦(K−1). The protection circuit is electronically connected between a base of the Kth PNP transistor and the ground and provides a discharge path. An electrostatic signal from the pad is conducted to the ground through the discharge path and the K PNP transistors.
摘要:
An electrostatic discharge (ESD) protection device electronically connected to a pad is provided. The ESD protection device includes K PNP transistors and a protection circuit, wherein K is a positive integer. An emitter of the 1st PNP transistor is electronically connected to the pad, a base of the ith PNP transistor is electronically connected to an emitter of the (i+1)th PNP transistor, and collectors of the K PNP transistors are electronically connected to a ground, wherein i is an integer and 1≦i≦(K−1). The protection circuit is electronically connected between a base of the Kth PNP transistor and the ground and provides a discharge path. An electrostatic signal from the pad is conducted to the ground through the discharge path and the K PNP transistors.
摘要:
A semiconductor device includes a first well region of a first conductivity, a second well region of a second conductivity type, a source region of the second conductivity type within the first well region, and a drain region of the second conductivity type at least partially within the second well region. A well contact to the first well region is coupled to the source. A third doped region of the first conductivity type and a fourth doped region of the second conductivity type are located in the second well region. A first transistor includes the third doped region, the second well region, and the first well region. The first transistor is coupled to a switch device. A second transistor includes the second well region, the first well region, and the source region. The first and the second transistors are configured to provide a current path during an ESD event.
摘要:
An electrophoresis display panel includes a plurality of first sub-pixels, a plurality of second sub-pixels, a plurality of third sub-pixels, and a plurality of white sub-pixels. The first sub-pixels, the second sub-pixels, and the third sub-pixels are suitable for irradiating different light of three primary colors, respectively, while the white sub-pixels are suitable for irradiating white light. Each of the first sub-pixels does not adjoin the second sub-pixels and the third sub-pixels. Each of the second sub-pixels does not adjoin the third sub-pixels. Each of the first sub-pixels adjoins the white sub-pixels exclusively or adjoins the white sub-pixels and other first sub-pixels exclusively.