摘要:
In at least one embodiment, a TFT includes: a first capacitor formed of a first capacitor electrode connected to a source electrode and a second capacitor electrode; a second capacitor formed of a third capacitor electrode and a fourth capacitor electrode; a first lead-out line; a second lead-out line connected to a gate electrode; a third lead-out line; a fourth lead-out line; a first interconnection; and a second interconnection. This realizes a TFT which can be easily saved from being a defective product even if leakage occurs in a capacitor connected to a TFT body section.
摘要:
A distance (d1) from an edge of a first region (R) at places (D) where branch electrodes (4b) extending, which branch off from an electrode line (4a) of a second source/drain electrode (4), start to overlap with a first region (R) to the electrode line (4a) is 5 μm or more. This realizes a TFT including a comb-shaped source/drain structure that enables easy repair of a source-drain leakage.
摘要:
In at least one embodiment, a TFT includes: a first capacitor formed of a first capacitor electrode connected to a source electrode and a second capacitor electrode; a second capacitor formed of a third capacitor electrode and a fourth capacitor electrode; a first lead-out line; a second lead-out line connected to a gate electrode; a third lead-out line; a fourth lead-out line; a first interconnection; and a second interconnection. This realizes a TFT which can be easily saved from being a defective product even if leakage occurs in a capacitor connected to a TFT body section.
摘要:
A TFT includes, in at least one embodiment, a capacitor formed: so as to have a region where a first capacitor electrode connected to a source electrode and a second capacitor electrode connected to a gate electrode are arranged to be stacked in a thickness direction and mutually opposed across a first dielectric layer therebetween; and so as to have a region where the first capacitor electrode and a third capacitor electrode connected to the gate electrode are arranged to be stacked in the thickness direction and mutually opposed across a second dielectric layer therebetween with a coupling between the first capacitor electrode and the third capacitor electrode and a coupling between the first capacitor electrode and the second capacitor electrode formed over mutually opposite faces of the first capacitor electrode. This realizes a TFT which can save a footprint of a capacitor connected to a TFT body section.
摘要:
A distance (d1) from an edge of a first region (R) at places (D) where branch electrodes (4b) extending, which branch off from an electrode line (4a) of a second source/drain electrode (4), start to overlap with a first region (R) to the electrode line (4a) is 5 μm or more. This realizes a TFT including a comb-shaped source/drain structure that enables easy repair of a source-drain leakage.
摘要:
The present invention provides a display device in which a frame region is reduced while preventing decrease in reliability and a method for manufacturing the same. The present invention is a display device comprising: a display panel including a first substrate, a second substrate, and a sealing member positioned between the first substrate and the second substrate, wherein the display panel includes at least a part of a circuit unit and a moisture blocking film in a region overlapping with the sealing member on the first substrate, and the moisture blocking film is provided in a region other than a display region and interposed between the circuit unit and the sealing member.
摘要:
The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.
摘要:
A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.
摘要:
The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.
摘要:
A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.