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    Mixed-signal single-chip integrated system electronics for data storage devices
    2.
    发明授权
    Mixed-signal single-chip integrated system electronics for data storage devices 有权
    用于数据存储设备的混合信号单芯片集成系统电子设备

    公开(公告)号：US07529869B2

    公开(公告)日：2009-05-05

    申请号：US11208348

    申请日：2005-08-18

    申请人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    发明人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    IPC分类号： G06F13/00

    CPC分类号： G06F3/0626 ,  G06F3/0658 ,  G06F3/0673 ,  G06F3/0676 ,  G11B19/00 ,  G11B20/10009 ,  G11B25/043

    摘要： An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

    摘要翻译： 集成数据存储控制系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其它以前分立的组件，在一个高度集成的系统设计中。 使用针对所有组件的单个集成电路技术类型（例如，数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。 本发明可以应用于磁性硬盘驱动器（HDD）或诸如软盘控制器，光盘驱动器（例如CD-ROM等），磁带驱动器和其他数据存储设备的其它类型的存储设备。

    MIXED-SIGNAL SINGLE-CHIP INTEGRATED SYSTEM ELECTRONICS FOR DATA STORAGE DEVICES
    4.
    发明申请
    MIXED-SIGNAL SINGLE-CHIP INTEGRATED SYSTEM ELECTRONICS FOR DATA STORAGE DEVICES 有权
    混合信号单芯片集成系统电子数据存储设备

    公开(公告)号：US20090274017A1

    公开(公告)日：2009-11-05

    申请号：US12435945

    申请日：2009-05-05

    申请人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, JR. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    发明人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, JR. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    IPC分类号： G11B21/10 ,  G06F13/38

    CPC分类号： G06F3/0626 ,  G06F3/0658 ,  G06F3/0673 ,  G06F3/0676 ,  G11B19/00 ,  G11B20/10009 ,  G11B25/043

    摘要： An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

    摘要翻译： 集成数据存储控制系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其它以前分立的组件，在一个高度集成的系统设计中。 使用针对所有组件的单个集成电路技术类型（例如，数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。 本发明可以应用于磁性硬盘驱动器（HDD）或诸如软盘控制器，光盘驱动器（例如CD-ROM等），磁带驱动器和其他数据存储设备的其它类型的存储设备。

    Integrated disc drive controller
    6.
    发明授权
    Integrated disc drive controller 有权
    集成磁盘驱动器控制器

    公开(公告)号：US07475173B2

    公开(公告)日：2009-01-06

    申请号：US11378456

    申请日：2006-03-17

    申请人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    发明人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    IPC分类号： G06F13/00

    CPC分类号： G06F3/0626 ,  G06F3/0658 ,  G06F3/0673 ,  G06F3/0676 ,  G11B19/00 ,  G11B20/10009 ,  G11B25/043

    摘要： An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

    摘要翻译： 集成数据存储控制系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其它以前分立的组件，在一个高度集成的系统设计中。 使用针对所有组件的单个集成电路技术类型（例如，数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。 本发明可以应用于磁性硬盘驱动器（HDD）或诸如软盘控制器，光盘驱动器（例如CD-ROM等），磁带驱动器和其他数据存储设备的其它类型的存储设备。

    Systems and methods for data storage devices and controllers
    7.
    发明授权
    Systems and methods for data storage devices and controllers 有权
    数据存储设备和控制器的系统和方法

    公开(公告)号：US08060674B2

    公开(公告)日：2011-11-15

    申请号：US12435945

    申请日：2009-05-05

    申请人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    发明人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    IPC分类号： G06F13/00

    CPC分类号： G06F3/0626 ,  G06F3/0658 ,  G06F3/0673 ,  G06F3/0676 ,  G11B19/00 ,  G11B20/10009 ,  G11B25/043

    摘要： An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

    摘要翻译： 集成数据存储控制系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其它以前分立的组件，在一个高度集成的系统设计中。 使用针对所有组件的单个集成电路技术类型（例如，数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。 本发明可以应用于磁性硬盘驱动器（HDD）或诸如软盘控制器，光盘驱动器（例如CD-ROM等），磁带驱动器和其他数据存储设备的其它类型的存储设备。

    Mixed-signal single-chip integrated system electronics for magnetic hard disk drives
    8.
    发明授权
    Mixed-signal single-chip integrated system electronics for magnetic hard disk drives 有权
    用于磁性硬盘驱动器的混合信号单芯片集成系统电子设备

    公开(公告)号：US06314480B1

    公开(公告)日：2001-11-06

    申请号：US09435719

    申请日：1999-11-08

    申请人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    发明人： Siamack Nemazie ,  Kaushik Popat ,  Balaji Virajpet ,  William R. Foland, Jr. ,  Roger McPherson ,  Maoxin Wei ,  Vineet Dujari ,  Shiang-Jyh Chang

    IPC分类号： G06F1300

    CPC分类号： G06F3/0626 ,  G06F3/0658 ,  G06F3/0673 ,  G06F3/0676 ,  G11B19/00 ,  G11B20/10009 ,  G11B25/043

    摘要： An integrated HDD system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g. digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. The invention takes advantage of existing circuit design modules provided in the integrated circuit as “hard block” components which are unchanged by integrated circuit design software. Changes in operability of the overall integrated circuit may be readily achieved by altering “soft block” components to customize or tailor the design for a particular hard drive. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components.

    摘要翻译： 集成式HDD系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其他以前分立组件的高度集成的系统设计。 使用用于所有组件的单个集成电路技术类型（例如数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 本发明利用集成电路中提供的现有电路设计模块作为集成电路设计软件不变的“硬块”组件。 通过改变“软块”组件来定制或定制特定硬盘驱动器的设计可以容易地实现整个集成电路的可操作性的改变。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。

    Wired combinational logic circuit with pullup and pulldown devices
    9.
    发明授权
    Wired combinational logic circuit with pullup and pulldown devices 失效
    具有上拉和下拉器件的有线组合逻辑电路

    公开(公告)号：US5804990A

    公开(公告)日：1998-09-08

    申请号：US633985

    申请日：1996-04-17

    申请人： Kaushik Popat ,  Bryan Richter ,  Stephen A. Smith

    发明人： Kaushik Popat ,  Bryan Richter ,  Stephen A. Smith

    IPC分类号： H03K19/00 ,  H03K19/017 ,  H03K19/0948 ,  H03K19/094 ,  H03K19/0175

    CPC分类号： H03K19/0013 ,  H03K19/01721 ,  H03K19/0948

    摘要： A wired combinational logic arrangement responsive to N binary signal sources includes N circuits, one for each source. The circuits drive a common output terminal. Each circuit includes first and second devices for pulling the common terminal to first and second different voltages during successive abutting activation periods. The first device supplies a current to the common terminal that is considerably greater than the current supplied to the common terminal by the second device. The arrangement further includes a third device for pulling the common terminal to the second voltage at all times. The third device supplies a current to the common terminal that is either equal to or less than the current supplied by the second device.

    摘要翻译： 响应于N个二进制信号源的有线组合逻辑装置包括N个电路，每个电源一个。 电路驱动公共输出端子。 每个电路包括用于在连续的邻接激活周期期间将公共端子拉到第一和第二不同电压的第一和第二装置。 第一设备向公共终端提供比由第二设备提供给公共终端的电流大得多的电流。 该装置还包括用于始终将公共端子拉到第二电压的第三装置。 第三装置向公共端子提供等于或小于第二装置提供的电流的电流。

    FIFO and method of operating same which inhibits output transitions when the last cell is read or when the FIFO is erased
    10.
    发明授权
    FIFO and method of operating same which inhibits output transitions when the last cell is read or when the FIFO is erased 失效
    FIFO和操作方法，当读取最后一个单元格或FIFO被擦除时，它禁止输出转换

    公开(公告)号：US06374313B1

    公开(公告)日：2002-04-16

    申请号：US08315792

    申请日：1994-09-30

    申请人： Kaushik Popat

    发明人： Kaushik Popat

    IPC分类号： G06F1200

    CPC分类号： G06F5/10

    摘要： A FIFO is operated so no changes occur on an output thereof in response to (1) only one stage of the FIFO having a signal stored therein when a read command is supplied to the FIFO exclusively of a write command and/or (2) the FIFO being flushed, i.e., erased. Result (1) is achieved by decrementing a write pointer by one without changing a read pointer or by loading the write pointer with the contents of the read pointer. Result (2) is achieved by loading the write pointer with the contents of the read pointer.

    摘要翻译： 操作FIFO，响应于（1）只有一级的FIFO具有存储在其中的信号，当读指令独占于写指令时被提供给FIFO时，并且/ FIFO被刷新，即擦除。 结果（1）通过将写指针递减1而不改变读指针或通过读写指针的内容加载写指针来实现。 结果（2）通过加载读指针的内容来实现。