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公开(公告)号：US10290624B2
公开(公告)日：2019-05-14
申请号：US15730419
申请日：2017-10-11
发明人： Fei Yao , Shijun Wang , Dengping Yin
IPC分类号： H01L27/02 , H01L29/66 , H01L29/861 , H01L29/06
摘要： Disclosed is an ESD protection device, comprising: a semiconductor substrate; a semiconductor buried layer located in the semiconductor substrate; an epitaxial semiconductor layer located on the semiconductor substrate and comprising a first doped region and a second doped region, wherein the semiconductor substrate and the first doped region are of a first doping type, the semiconductor buried layer, the epitaxial semiconductor layer and the second doped region are of a second doping type, the first doping type and the second doping type are opposite to each other, and the first doped region forms a plurality of interfaces with the epitaxial semiconductor layer. The disclosure improves protection performance and maximum current bearing capacity without increasing parasitic capacitance of the ESD protection device.
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公开(公告)号：US20170345811A1
公开(公告)日：2017-11-30
申请号：US15606976
申请日：2017-05-26
发明人： Dengping Yin , Shijun Wang , Fei Yao
CPC分类号： H01L27/0248 , H01L23/60 , H01L23/62 , H01L27/0259 , H01L29/41 , H02H9/04
摘要： Disclosed is a method for manufacturing an ESD protection device. The method comprises: forming a first buried layer on the semiconductor substrate; forming a first epitaxial layer on the semiconductor substrate; forming a first doped region in the first epitaxial layer and forming a second doped region surrounding the first doped region in the first epitaxial layer, wherein the semiconductor substrate and the first doped region are both of a first doping type, the buried layer and the first epitaxial layer are both of a second doping type, the first doping type is opposite to the second doping type, the first doped region and the second doped region are formed using a same first mask. The method uses the same mask to form an emitter region of the open-base bipolar transistor, and to form a barrier doped region at the periphery of the emitter region, so that the manufacture cost is reduced and the parasitic capacitance of the ESD protection device is decreased.
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公开(公告)号：US09679998B2
公开(公告)日：2017-06-13
申请号：US15088297
申请日：2016-04-01
发明人： Fei Yao , Shijun Wang , Bo Qin
IPC分类号： H01L29/747 , H01L29/74 , H01L29/66
CPC分类号： H01L29/7424 , H01L29/0649 , H01L29/6609 , H01L29/66386 , H01L29/747 , H01L29/861
摘要： In one embodiment, a bi-directional punch-through semiconductor device can include: a first transistor in a first region of a semiconductor substrate of a first conductivity type, where the first transistor includes a semiconductor buried layer of a second conductivity type in the semiconductor substrate, and a first epitaxy region of an epitaxy semiconductor layer above the semiconductor buried layer, the semiconductor buried layer being configured as a base of the first transistor; and a second transistor coupled in parallel with the first transistor, where the second transistor is in a second region of the semiconductor substrate of the first conductivity type, where the second transistor comprises a second epitaxy region of the epitaxy semiconductor layer above the semiconductor substrate, and a first doped region of the second conductivity type in the second epitaxy region, the first doped region being configured as a base of the second transistor.
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公开(公告)号：US20220238508A1
公开(公告)日：2022-07-28
申请号：US17720262
申请日：2022-04-13
发明人： Fei Yao , Shijun Wang , Dengping Yin
IPC分类号： H01L27/02 , H01L29/861 , H01L27/08 , H01L29/06 , H01L29/66 , H01L29/872 , H02H9/04
摘要： Disclosed is a vertical device, an ESD protection device having the vertical device, and a method for manufacturing the vertical device. The vertical device includes a forward diode which is formed by a semiconductor substrate and an epitaxial semiconductor layer, and a reverse Schottky barrier between an anode metal and the epitaxial semiconductor layer. The vertical device has a vertical current path from a second electrode to a first electrode, and a lateral current distribution at least partially surrounded and limited by the reverse Schottky barrier. The reverse Schottky barrier reduces the parasitic capacitance of the diode at high voltages, thereby increasing the response speed of the ESD protection device at high voltages.
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公开(公告)号：US20200243504A1
公开(公告)日：2020-07-30
申请号：US16850230
申请日：2020-04-16
发明人： Fei Yao , Shijun Wang , Dengping Yin
IPC分类号： H01L27/02 , H01L29/861 , H01L27/08 , H01L29/06 , H01L29/66 , H01L29/872 , H02H9/04
摘要： Disclosed is a rectification device, a method for manufacturing the same and an ESD protection device. The rectification device comprises: a semiconductor substrate with a doping type of P-type; an epitaxial semiconductor layer with a doping type of N-type and located on the semiconductor substrate; a first doped region with a doping type of N-type and located in the epitaxial semiconductor layer; wherein the semiconductor substrate and the epitaxial semiconductor layer are respectively used as an anode and a cathode of the rectification device, and the rectification device further comprises a reverse Schottky barrier being formed in the cathode. According to the disclosure, a reverse Schottky barrier is formed to reduce the parasitic capacitance of the diode at high voltages, thereby increasing the response speed of the ESD protection device at high voltages.
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公开(公告)号：US10128227B2
公开(公告)日：2018-11-13
申请号：US15671816
申请日：2017-08-08
发明人： Shijun Wang , Fei Yao , Dengping Yin
IPC分类号： H01L27/082 , H01L27/102 , H01L29/70 , H01L31/11 , H01L27/02 , H01L21/761 , H01L21/762 , H01L21/8222 , H01L27/06 , H01L29/06 , H01L27/07
摘要： Disclosed is a method for manufacturing an ESD protection device. The ESD protection device includes a rectifier diode and an open-base bipolar transistor, the anode of the rectifier diode is the first doped region and the cathode of the rectifier diode is the semiconductor substrate, the emitter region, base region and collector region of the open-base bipolar transistor are the second doped region, the epitaxial semiconductor layer and semiconductor substrate, respectively, the first doped region and the second doped region extend through the doped region into the epitaxial semiconductor layer by a predetermined depth. The doped region can suppress the induced doped region around the second doped region, so that the parasitic capacitance of the open-base bipolar transistor is reduced and the response speed is improved.
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公开(公告)号：US20180102413A1
公开(公告)日：2018-04-12
申请号：US15728160
申请日：2017-10-09
发明人： Dengping Yin , Shijun Wang , Fei Yao
IPC分类号： H01L29/40 , H01L21/283
摘要： The invention disclosed a method for manufacturing an electrode of a semiconductor device, comprising: forming a first interlayer dielectric layer having a first opening on a first surface of a semiconductor substrate; forming a first resist mask having a second opening on a surface of the first interlayer dielectric layer, wherein the first opening and the second opening are connected to form a first stacked opening; forming a first conductive layer on the first resist mask, wherein the first conductive layer comprises a first portion being located on a surface of the first resist mask and a second portion being located inside the first stacked opening; and removing the first resist mask, wherein the first portion of the first conductive layer is removed together with the first resist mask, and the second portion of the first conductive layer is retained as a first surface electrode.
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公开(公告)号：US09929137B2
公开(公告)日：2018-03-27
申请号：US15606976
申请日：2017-05-26
发明人： Dengping Yin , Shijun Wang , Fei Yao
CPC分类号： H01L27/0248 , H01L23/60 , H01L23/62 , H01L27/0259 , H01L29/41 , H02H9/04
摘要： Disclosed is a method for manufacturing an ESD protection device. The method comprises: forming a first buried layer on the semiconductor substrate; forming a first epitaxial layer on the semiconductor substrate; forming a first doped region in the first epitaxial layer and forming a second doped region surrounding the first doped region in the first epitaxial layer, wherein the semiconductor substrate and the first doped region are both of a first doping type, the buried layer and the first epitaxial layer are both of a second doping type, the first doping type is opposite to the second doping type, the first doped region and the second doped region are formed using a same first mask. The method uses the same mask to form an emitter region of the open-base bipolar transistor, and to form a barrier doped region at the periphery of the emitter region, so that the manufacture cost is reduced and the parasitic capacitance of the ESD protection device is decreased.
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公开(公告)号：US09911730B2
公开(公告)日：2018-03-06
申请号：US15268773
申请日：2016-09-19
发明人： Fei Yao , Shijun Wang
IPC分类号： H01L21/336 , H01L27/02 , H01L29/866 , H01L29/06 , H01L23/528 , H01L21/761 , H01L21/283 , H01L29/66
CPC分类号： H01L27/0255 , H01L21/283 , H01L21/761 , H01L23/5283 , H01L29/0646 , H01L29/66106 , H01L29/866
摘要： A transient voltage suppressor can include: a semiconductor substrate; a first buried layer of a first type formed in and on the semiconductor substrate; a second buried layer of a second type formed in a first region of the first buried layer; a first epitaxial region of the second type formed on the second buried layer and a second epitaxial region of the first type formed on a second region of the first buried layer; a first doped region of the first type formed in the first epitaxial region and a second doped region of the second type formed in the second epitaxial region; a conductive channel extending from a surface of the second epitaxial region into the first buried layer; and a first electrode connected to the conductive channel, a second electrode connected to the first doped region, and a third electrode connected to the second doped region.
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10.发明申请公开(公告)号：US20180047718A1
公开(公告)日：2018-02-15
申请号：US15670497
申请日：2017-08-07
发明人： Fei Yao , Shijun Wang , Dengping Yin
CPC分类号： H01L27/0255 , H01L21/77 , H01L23/60 , H01L27/0259 , H01L28/20 , H01L29/866
摘要： Disclosed are a semiconductor structure of an ESD protection device with low capacitance and a method for manufacturing the same. The method for manufacturing a semiconductor structure of an ESD protection device, comprising: forming a buried layer with a first doping type and a buried layer with a second doping type in a first region and a second region at a top surface of a semiconductor substrate with a first doping type, respectively; forming an epitaxial layer with a second doping type on the buried layer with the first doping type and the buried layer with the second doping type, wherein the buried layer with the first doping type and the buried layer with the second doping type are buried between the semiconductor substrate and the epitaxial layer, a first doped region with a first doping type is formed at a top of a third region on the buried layer with the second doping type located on the epitaxial layer.
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